diff options
| author | Ilya Bakoulin <Ilya.Bakoulin@amd.com> | 2026-04-07 15:01:00 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2026-04-17 15:41:15 -0400 |
| commit | f67790a0715edd292d64a104e6e294290243d16d (patch) | |
| tree | b6ddaa0dc24b8f80f70abaece2a14697440edb2f /drivers | |
| parent | f4cdbb5d54057838b14a9b537309df24f20232c2 (diff) | |
drm/amd/display: Fix double free
[Why/How]
Reset pointer/address to avoid double free.
Reviewed-by: Sridevi Arvindekar <sridevi.arvindekar@amd.com>
Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c index 72b0f3f8c2fd..e39fd97b3ffd 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c @@ -736,9 +736,12 @@ void dcn42_notify_wm_ranges(struct clk_mgr *clk_mgr_base) clk_mgr_dcn42->smu_wm_set.mc_address.low_part); dcn42_smu_transfer_wm_table_dram_2_smu(clk_mgr); - if (clk_mgr_dcn42->smu_wm_set.wm_set && clk_mgr_dcn42->smu_wm_set.mc_address.quad_part != 0) + if (clk_mgr_dcn42->smu_wm_set.wm_set && clk_mgr_dcn42->smu_wm_set.mc_address.quad_part != 0) { dm_helpers_free_gpu_mem(clk_mgr->base.ctx, DC_MEM_ALLOC_TYPE_GART, clk_mgr_dcn42->smu_wm_set.wm_set); + clk_mgr_dcn42->smu_wm_set.wm_set = NULL; + clk_mgr_dcn42->smu_wm_set.mc_address.quad_part = 0; + } } @@ -1101,7 +1104,10 @@ void dcn42_clk_mgr_destroy(struct clk_mgr_internal *clk_mgr_int) { struct clk_mgr_dcn42 *clk_mgr = TO_CLK_MGR_DCN42(clk_mgr_int); - if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) + if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) { dm_helpers_free_gpu_mem(clk_mgr_int->base.ctx, DC_MEM_ALLOC_TYPE_GART, clk_mgr->smu_wm_set.wm_set); + clk_mgr->smu_wm_set.wm_set = NULL; + clk_mgr->smu_wm_set.mc_address.quad_part = 0; + } } |