diff options
| author | Alex Frid <afrid@nvidia.com> | 2010-03-05 19:08:02 -0800 |
|---|---|---|
| committer | Gary King <gking@nvidia.com> | 2010-03-08 15:49:46 -0800 |
| commit | ab7b7f907c9b7ae9812581ff5535fd98474ba76b (patch) | |
| tree | 8bc8202f8f4b1906215fa468d87ae3da363a71c1 /fs/udf/fsync.c | |
| parent | 4646176e2e325e692423dfbee0f07f88210f36f1 (diff) | |
Tegra RM: Removed 50MHz floor for MIPI PLL output.tegra-9.12.7
Removed 50MHz floor for MIPI PLL high speed output frequency. This
floor kept MIPI PLL low speed output (= high speed output / 8) above
DSI panel specification - bug 651446.
Change-Id: Id1d3314b46896cc8f6fb48d238ffed01fd6b4e4a
Reviewed-on: http://git-master/r/787
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com>
Tested-by: Venkata (Muni) Anda <vanda@nvidia.com>
Diffstat (limited to 'fs/udf/fsync.c')
0 files changed, 0 insertions, 0 deletions