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authorMark Brown <broonie@kernel.org>2022-09-15 10:29:01 +0100
committerMark Brown <broonie@kernel.org>2022-09-15 10:29:01 +0100
commit12e51866c79fe37faed276442f4b0dfd9f2dc174 (patch)
tree8c2c85171d6eb06fbc7c4d0e06ed8be97a3448cc /include/drm
parenta6b0be65123e1dfbcce6653a82394f989d3372ff (diff)
parentb2d7616e13c4eb766f5e2f6568c2e746e76b7b53 (diff)
ASoC/qcom/arm64: Qualcomm ADSP DTS and binding fixes
Merge series from Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>: Hi, Dependencies/merging ==================== 1. The DTS patches are independent. 2. The binding patches should come together, because of context changes. Could be one of: Qualcomm SoC, ASoC or DT tree. Changes since v3 ================ 1. Patch 9-10: re-order, so first apr.yaml is corrected and then we convert to DT schema. This makes patchset fully bisectable in expense of changing the same lines twice. 2. Patch 11: New patch. Changes since v2 ================ 1. Patch 9: rename and extend commit msg. 2. Add Rb tags. Changes since v1 ================ 1. Patch 9: New patch. 2. Patch 10: Correct also sound/qcom,q6apm-dai.yaml (Rob). 2. Patch 13: New patch. 3. Add Rb/Tb tags. Best regards, Krzysztof Krzysztof Kozlowski (15): arm64: dts: qcom: sdm630: align APR services node names with dtschema arm64: dts: qcom: sdm845: align APR services node names with dtschema arm64: dts: qcom: sm8250: align APR services node names with dtschema arm64: dts: qcom: msm8996: fix APR services nodes arm64: dts: qcom: sdm845: align dai node names with dtschema arm64: dts: qcom: msm8996: align dai node names with dtschema arm64: dts: qcom: qrb5165-rb5: align dai node names with dtschema arm64: dts: qcom: sm8250: use generic name for LPASS clock controller dt-bindings: soc: qcom: apr: correct service children ASoC: dt-bindings: qcom,q6asm: convert to dtschema ASoC: dt-bindings: qcom,q6adm: convert to dtschema ASoC: dt-bindings: qcom,q6dsp-lpass-ports: cleanup example ASoC: dt-bindings: qcom,q6dsp-lpass-clocks: cleanup example ASoC: dt-bindings: qcom,q6apm-dai: adjust indentation in example dt-bindings: soc: qcom: apr: add missing properties .../bindings/soc/qcom/qcom,apr.yaml | 112 ++++++++++++++++-- .../bindings/sound/qcom,q6adm-routing.yaml | 52 ++++++++ .../devicetree/bindings/sound/qcom,q6adm.txt | 39 ------ .../bindings/sound/qcom,q6apm-dai.yaml | 21 ++-- .../bindings/sound/qcom,q6asm-dais.yaml | 112 ++++++++++++++++++ .../devicetree/bindings/sound/qcom,q6asm.txt | 70 ----------- .../sound/qcom,q6dsp-lpass-clocks.yaml | 36 +++--- .../sound/qcom,q6dsp-lpass-ports.yaml | 64 +++++----- arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 +- arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 4 +- arch/arm64/boot/dts/qcom/sdm630.dtsi | 8 +- arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 2 +- .../boot/dts/qcom/sdm845-xiaomi-beryllium.dts | 2 +- .../boot/dts/qcom/sdm845-xiaomi-polaris.dts | 4 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 +- arch/arm64/boot/dts/qcom/sm8250.dtsi | 10 +- 16 files changed, 346 insertions(+), 208 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/qcom,q6adm-routing.yaml delete mode 100644 Documentation/devicetree/bindings/sound/qcom,q6adm.txt create mode 100644 Documentation/devicetree/bindings/sound/qcom,q6asm-dais.yaml delete mode 100644 Documentation/devicetree/bindings/sound/qcom,q6asm.txt -- 2.34.1
Diffstat (limited to 'include/drm')
-rw-r--r--include/drm/drm_connector.h4
-rw-r--r--include/drm/drm_edid.h5
2 files changed, 7 insertions, 2 deletions
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index a1705d6b3fba..7df7876b2ad5 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -319,8 +319,8 @@ enum drm_panel_orientation {
* EDID's detailed monitor range
*/
struct drm_monitor_range_info {
- u8 min_vfreq;
- u8 max_vfreq;
+ u16 min_vfreq;
+ u16 max_vfreq;
};
/**
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 2181977ae683..1ed61e2b30a4 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -92,6 +92,11 @@ struct detailed_data_string {
u8 str[13];
} __attribute__((packed));
+#define DRM_EDID_RANGE_OFFSET_MIN_VFREQ (1 << 0) /* 1.4 */
+#define DRM_EDID_RANGE_OFFSET_MAX_VFREQ (1 << 1) /* 1.4 */
+#define DRM_EDID_RANGE_OFFSET_MIN_HFREQ (1 << 2) /* 1.4 */
+#define DRM_EDID_RANGE_OFFSET_MAX_HFREQ (1 << 3) /* 1.4 */
+
#define DRM_EDID_DEFAULT_GTF_SUPPORT_FLAG 0x00
#define DRM_EDID_RANGE_LIMITS_ONLY_FLAG 0x01
#define DRM_EDID_SECONDARY_GTF_SUPPORT_FLAG 0x02