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authorBjorn Andersson <andersson@kernel.org>2026-08-31 15:06:45 -0500
committerBjorn Andersson <bjorn.andersson@oss.qualcomm.com>2026-09-23 18:24:29 -0500
commit439785c08f53cbaa2121d29f403e150461a49f7f (patch)
tree20975c6a5e9a0f188761589bcb122fd7a2f3276d /include/dt-bindings/clock
parent601a539fc827935d08d695bd7f4a0ed287a8a988 (diff)
parent239819e9f12e21fc35724f780fa99768d1ced993 (diff)
Merge branch '20260805-qcs8300-tsc-clks-v1-1-e7a5101ed479@oss.qualcomm.com' into clk-for-7.4
Merge the additional Monaco TSC clock controller constants through a topci branch to make the available for DeviceTree as well.
Diffstat (limited to 'include/dt-bindings/clock')
-rw-r--r--include/dt-bindings/clock/qcom,qcs8300-gcc.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/qcom,qcs8300-gcc.h b/include/dt-bindings/clock/qcom,qcs8300-gcc.h
index a0083b1d2126..3c674c7baaba 100644
--- a/include/dt-bindings/clock/qcom,qcs8300-gcc.h
+++ b/include/dt-bindings/clock/qcom,qcs8300-gcc.h
@@ -191,6 +191,11 @@
#define GCC_VIDEO_AXI0_CLK 181
#define GCC_VIDEO_AXI1_CLK 182
#define GCC_VIDEO_XO_CLK 183
+#define GCC_GPLL5 184
+#define GCC_TSCSS_AHB_CLK 185
+#define GCC_TSCSS_CNTR_CLK_SRC 186
+#define GCC_TSCSS_ETU_CLK 187
+#define GCC_TSCSS_GLOBAL_CNTR_CLK 188
/* GCC power domains */
#define GCC_EMAC0_GDSC 0
@@ -230,5 +235,6 @@
#define GCC_VIDEO_BCR 26
#define GCC_VIDEO_AXI0_CLK_ARES 27
#define GCC_VIDEO_AXI1_CLK_ARES 28
+#define GCC_TSCSS_BCR 29
#endif