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authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>2025-01-14 12:54:52 +0100
committerRussell King (Oracle) <rmk+kernel@armlinux.org.uk>2025-01-14 12:29:30 +0000
commita9ff94477836cb43d94efbd9a851213944800177 (patch)
tree5a805a10862227e2a6330df0df3d66fbf88a89ff /include/linux/cacheinfo.h
parent961d234779867695a7724fd4fb0a5a1bd3d4ccab (diff)
ARM: 9433/2: implement cacheinfo support
On ARMv7 / v7m machines read CTR and CLIDR registers to provide information regarding the cache topology. Earlier machines should describe full cache topology in the device tree. Note, this follows the ARM64 cacheinfo support and provides only minimal support required to bootstrap cache info. All useful properties should be decribed in Device Tree. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'include/linux/cacheinfo.h')
-rw-r--r--include/linux/cacheinfo.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h
index 108060612bb8..1e7061549fc7 100644
--- a/include/linux/cacheinfo.h
+++ b/include/linux/cacheinfo.h
@@ -147,7 +147,7 @@ static inline int get_cpu_cacheinfo_id(int cpu, int level)
return ci ? ci->id : -1;
}
-#ifdef CONFIG_ARM64
+#if defined(CONFIG_ARM64) || defined(CONFIG_ARM)
#define use_arch_cache_info() (true)
#else
#define use_arch_cache_info() (false)