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| author | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2021-02-15 17:00:22 +0100 |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2021-02-15 17:00:22 +0100 |
| commit | acc3a645ef4bb301366a609730df3cd6a52154a1 (patch) | |
| tree | 9b64ca50d954c29b29fed94656b3a6c916e3aae0 /include/linux/nvme.h | |
| parent | e1d3209f95a19df16080b069265e172738189807 (diff) | |
| parent | 8a3f1f181d39892e6ca11485a3c3ec15bb8e1a60 (diff) | |
Merge branches 'pm-cpuidle' and 'pm-cpufreq'
* pm-cpuidle:
MAINTAINERS: cpuidle: exynos: include header in file pattern
intel_idle: remove definition of DEBUG
* pm-cpufreq:
cpufreq: Remove unused flag CPUFREQ_PM_NO_WARN
cpufreq: Remove CPUFREQ_STICKY flag
cpufreq: intel_pstate: Remove repeated word
cpufreq: remove tango driver
cpufreq: brcmstb-avs-cpufreq: Fix resource leaks in ->remove()
cpufreq: brcmstb-avs-cpufreq: Free resources in error path
cpufreq: qcom-hw: enable boost support
cpufreq: tegra20: Use resource-managed API
cpufreq: intel_pstate: Get per-CPU max freq via MSR_HWP_CAPABILITIES if available
cpufreq: intel_pstate: Rename two functions
cpufreq: intel_pstate: Change intel_pstate_get_hwp_max() argument
cpufreq: intel_pstate: Always read hwp_cap_cached with READ_ONCE()
Diffstat (limited to 'include/linux/nvme.h')
| -rw-r--r-- | include/linux/nvme.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/linux/nvme.h b/include/linux/nvme.h index d92535997687..bfed36e342cc 100644 --- a/include/linux/nvme.h +++ b/include/linux/nvme.h @@ -116,6 +116,9 @@ enum { NVME_REG_BPMBL = 0x0048, /* Boot Partition Memory Buffer * Location */ + NVME_REG_CMBMSC = 0x0050, /* Controller Memory Buffer Memory + * Space Control + */ NVME_REG_PMRCAP = 0x0e00, /* Persistent Memory Capabilities */ NVME_REG_PMRCTL = 0x0e04, /* Persistent Memory Region Control */ NVME_REG_PMRSTS = 0x0e08, /* Persistent Memory Region Status */ @@ -135,6 +138,7 @@ enum { #define NVME_CAP_CSS(cap) (((cap) >> 37) & 0xff) #define NVME_CAP_MPSMIN(cap) (((cap) >> 48) & 0xf) #define NVME_CAP_MPSMAX(cap) (((cap) >> 52) & 0xf) +#define NVME_CAP_CMBS(cap) (((cap) >> 57) & 0x1) #define NVME_CMB_BIR(cmbloc) ((cmbloc) & 0x7) #define NVME_CMB_OFST(cmbloc) (((cmbloc) >> 12) & 0xfffff) @@ -192,6 +196,8 @@ enum { NVME_CSTS_SHST_OCCUR = 1 << 2, NVME_CSTS_SHST_CMPLT = 2 << 2, NVME_CSTS_SHST_MASK = 3 << 2, + NVME_CMBMSC_CRE = 1 << 0, + NVME_CMBMSC_CMSE = 1 << 1, }; struct nvme_id_power_state { |