Merge tag 'soundwire-7.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire

Pull soundwire updates from Vinod Koul:

 - Intel dmi quirks ghost list handling for Asus Zenbook Duo,
   Asus ROG Zephyrus Duo and Asus Expertbook. Intel Peripheral
   bra_block_alignment handling

 - Cadence library BRA_NumBytes[8] support

 - Qualcomm SCP address paging, bus mclk_freq support. Increase of
   data ports to 17 and driver improvements

* tag 'soundwire-7.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire:
  soundwire: dmi-quirks: Disable ghost Realtek on Asus ROG Zephyrus Duo
  soundwire: stream: validate slave port properties
  soundwire: honor clock_reg_supported in the clock scaling check
  soundwire: qcom: set the bus mclk_freq property
  soundwire: dmi-quirks: Disable ghost Realtek on Asus Zenbook Duo
  soundwire: intel_ace2x: handle the max_data_per_frame property
  soundwire: get mipi-sdw-bra-mode-max-data-per-frame property
  soundwire: intel: handle Peripheral bra_block_alignment
  soundwire: Add bra_block_alignment property support
  soundwire: cadence_master: add BRA_NumBytes[8] support
  soundwire: bus.h: repair kernel-doc comments
  soundwire: intel_auxdevice: Add cs42l44 to wake_capable_list
  soundwire: qcom: add SCP address paging support
  soundwire: dmi-quirks: add a global ghost list
  soundwire: dmi-quirks: Disable ghost Realtek on Asus Expertbook
  soundwire: qcom: Allocate sruntime array dynamically
  soundwire: qcom: Fix port exhaustion check in stream_alloc_ports
  dt-bindings: soundwire: qcom: Increase max data ports to 17

1 files changed, 14 insertions, 0 deletions

diff --git a/include/linux/soundwire/sdw.h b/include/linux/soundwire/sdw.h
index 79dd44922fbc..707ca6bd1e23 100644
--- a/include/linux/soundwire/sdw.h
+++ b/include/linux/soundwire/sdw.h
@@ -365,6 +365,10 @@ struct sdw_dpn_prop {
  * @commit_register_supported: is PCP_Commit register supported
  * @scp_int1_mask: SCP_INT1_MASK desired settings
  * @lane_maps: Lane mapping for the slave, only valid if lane_control_support is set
+ * @bra_block_alignment: If non-zero the length of data in a BRA frame must be
+ *			 a multiple of this number of bytes.
+ * @bra_max_data_per_frame: If non-zero the maximum data payload size (in bytes per
+ *			    frame excluding header, CRC, and footer) for this BRA Mode
  * @clock_reg_supported: the Peripheral implements the clock base and scale
  * registers introduced with the SoundWire 1.2 specification. SDCA devices
  * do not need to set this boolean property as the registers are required.
@@ -395,6 +399,8 @@ struct sdw_slave_prop {
 	u8 commit_register_supported;
 	u8 scp_int1_mask;
 	u8 lane_maps[SDW_MAX_LANES];
+	u32 bra_block_alignment;
+	u32 bra_max_data_per_frame;
 	bool clock_reg_supported;
 	bool use_domain_irq;
 };
@@ -837,6 +843,14 @@ struct sdw_defer {
  */
 #define SDW_BPT_MSG_MAX_BYTES  (1024 * 1024)
 
+/*
+ * According to mipi SoundWire DisCo Specification_v2-1,
+ * this maximum value shall not exceed 470.
+ * Note that the largest number of bytes accessible by a single BRA operation is limited to 470
+ * bytes when using lane 0, but goes up to 502 bytes when using one of the optional extra lanes.
+ */
+#define SDW_BRA_MAX_BYTES_PER_FRAME  470
+
 struct sdw_bpt_msg;
 
 /**