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| author | Imre Deak <imre.deak@intel.com> | 2025-12-22 17:35:42 +0200 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2026-01-13 18:42:19 +0200 |
| commit | 8193ce906a8656892334b17e60e19ae7aeea220f (patch) | |
| tree | 7764d0adb4fab73ed9ea0288e27bf832fab816ae /include/linux/tty_buffer.h | |
| parent | 4d2dd780970d33d4dd66c718077ee703938b0a71 (diff) | |
drm/i915/dp: Simplify computing DSC BPPs for eDP
The maximum pipe BPP value (used as the DSC input BPP) has been aligned
already to the corresponding source/sink input BPP capabilities in
intel_dp_compute_config_limits(). So it isn't needed to perform the same
alignment again in intel_edp_dsc_compute_pipe_bpp() called later, this
function can simply use the already aligned maximum pipe BPP value, do
that.
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20251222153547.713360-16-imre.deak@intel.com
Diffstat (limited to 'include/linux/tty_buffer.h')
0 files changed, 0 insertions, 0 deletions
