diff options
| author | Jouni Högander <jouni.hogander@intel.com> | 2025-12-04 09:07:16 +0200 |
|---|---|---|
| committer | Jouni Högander <jouni.hogander@intel.com> | 2025-12-10 15:04:15 +0200 |
| commit | 1f5df537fa7910a6bdc96a7cb73c65fd30e2aab5 (patch) | |
| tree | 9a0ec6b85b2831c8c2e57167ab77116e5d4b9555 /include/linux | |
| parent | 0c085485a90351bb38dc97c2df99ac2038d0d87c (diff) | |
drm/i915/psr: Set plane id bit in crtc_state->async_flip_planes for PSR
Currently plane id bit is set in crtc_state->async_flip_planes only when
async flip toggle workaround is needed. We want to utilize
crtc_state->async_flip_planes further in Selective Fetch calculation.
v2:
- rework if-else if to if-if
- added comment updated
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20251204070718.1090778-2-jouni.hogander@intel.com
Diffstat (limited to 'include/linux')
0 files changed, 0 insertions, 0 deletions