diff options
| author | Olof Johansson <olof@lixom.net> | 2014-02-20 00:34:58 -0800 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2014-02-20 00:34:58 -0800 |
| commit | 58035fcc94ef4289fe6c4084a6d540a0ee30d689 (patch) | |
| tree | b9d27b74f6a19664c7b8c44755f823c812756d75 /include/linux | |
| parent | 805937cf45f9a9933e6b8e5c6660406e977a9a23 (diff) | |
| parent | 012a7069b5a10a0851584d71a1facdc40a972319 (diff) | |
Merge tag 'renesas-soc-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Merge "Renesas ARM Based SoC Updates for v3.15" from Simon Horman:
* r7s72100 SoC (RZ/A1H)
- Add i2c clocks (portion missing from previous patch due to miss-merge)
* r8a7791 (R-Car M2)
- Add SATA clocks
- Add ZS clock
- Wait for status on all MSTP clocks
-- Add I2C and VIN clocks
* r8a7790 (R-Car H2)
- Add PCI USB host clock support
- Add Audio DMAC, SATA and VIN clocks
- Add Audio DMAC support
* r8a7779 (R-Car H1)
- Wait for status on selected MSTP clocks
* tag 'renesas-soc-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7790: Add PCI USB host clock support
ARM: shmobile: r7s72100: really add i2c clocks
ARM: shmobile: r8a7791: Add SATA clocks
ARM: shmobile: r8a7791: Add ZS clock
ARM: shmobile: r8a7790: Add SATA clocks
ARM: shmobile: r8a7790: Add VIN clock support
ARM: shmobile: r8a7790: add Audio DMAC support
ARM: shmobile: r8a7790: add Audio DMAC clock
ARM: shmobile: r8a7791: Wait for status on all MSTP clocks
ARM: shmobile: r8a7791: Add VIN clocks
ARM: shmobile: r8a7791: Add I2C clocks
ARM: shmobile: r8a7790: Wait for status on all MSTP clocks
ARM: shmobile: r8a7779: Wait for status on selected MSTP clocks
ARM: shmobile: wait for MSTP clock status to toggle, when enabling it
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/sh_clk.h | 19 |
1 files changed, 12 insertions, 7 deletions
diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h index 60c72395ec6b..1f208b2a1ed6 100644 --- a/include/linux/sh_clk.h +++ b/include/linux/sh_clk.h @@ -52,6 +52,7 @@ struct clk { unsigned long flags; void __iomem *enable_reg; + void __iomem *status_reg; unsigned int enable_bit; void __iomem *mapped_reg; @@ -116,22 +117,26 @@ long clk_round_parent(struct clk *clk, unsigned long target, unsigned long *best_freq, unsigned long *parent_freq, unsigned int div_min, unsigned int div_max); -#define SH_CLK_MSTP(_parent, _enable_reg, _enable_bit, _flags) \ +#define SH_CLK_MSTP(_parent, _enable_reg, _enable_bit, _status_reg, _flags) \ { \ .parent = _parent, \ .enable_reg = (void __iomem *)_enable_reg, \ .enable_bit = _enable_bit, \ + .status_reg = _status_reg, \ .flags = _flags, \ } -#define SH_CLK_MSTP32(_p, _r, _b, _f) \ - SH_CLK_MSTP(_p, _r, _b, _f | CLK_ENABLE_REG_32BIT) +#define SH_CLK_MSTP32(_p, _r, _b, _f) \ + SH_CLK_MSTP(_p, _r, _b, 0, _f | CLK_ENABLE_REG_32BIT) -#define SH_CLK_MSTP16(_p, _r, _b, _f) \ - SH_CLK_MSTP(_p, _r, _b, _f | CLK_ENABLE_REG_16BIT) +#define SH_CLK_MSTP32_STS(_p, _r, _b, _s, _f) \ + SH_CLK_MSTP(_p, _r, _b, _s, _f | CLK_ENABLE_REG_32BIT) -#define SH_CLK_MSTP8(_p, _r, _b, _f) \ - SH_CLK_MSTP(_p, _r, _b, _f | CLK_ENABLE_REG_8BIT) +#define SH_CLK_MSTP16(_p, _r, _b, _f) \ + SH_CLK_MSTP(_p, _r, _b, 0, _f | CLK_ENABLE_REG_16BIT) + +#define SH_CLK_MSTP8(_p, _r, _b, _f) \ + SH_CLK_MSTP(_p, _r, _b, 0, _f | CLK_ENABLE_REG_8BIT) int sh_clk_mstp_register(struct clk *clks, int nr); |