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authorVinod Koul <vinod.koul@intel.com>2015-10-31 07:35:07 +0530
committerVinod Koul <vinod.koul@intel.com>2015-10-31 07:35:07 +0530
commit6df056d8e69a557ac76bc7a88960e4addbc98386 (patch)
tree6329893f9dc953d3a87a2a6a6a22356d99d0562c /include/linux
parent67d25f0d4e24775418aae403610cae99e27cdc3c (diff)
parentdf5c7386f62d2db95ca48005087195e9a15e2b1f (diff)
Merge branch 'topic/dw' into for-linus
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/platform_data/dma-dw.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/platform_data/dma-dw.h b/include/linux/platform_data/dma-dw.h
index 87ac14c584f2..03b6095d3b18 100644
--- a/include/linux/platform_data/dma-dw.h
+++ b/include/linux/platform_data/dma-dw.h
@@ -37,6 +37,7 @@ struct dw_dma_slave {
* @nr_channels: Number of channels supported by hardware (max 8)
* @is_private: The device channels should be marked as private and not for
* by the general purpose DMA channel allocator.
+ * @is_memcpy: The device channels do support memory-to-memory transfers.
* @chan_allocation_order: Allocate channels starting from 0 or 7
* @chan_priority: Set channel priority increasing from 0 to 7 or 7 to 0.
* @block_size: Maximum block size supported by the controller
@@ -47,6 +48,7 @@ struct dw_dma_slave {
struct dw_dma_platform_data {
unsigned int nr_channels;
bool is_private;
+ bool is_memcpy;
#define CHAN_ALLOCATION_ASCENDING 0 /* zero to seven */
#define CHAN_ALLOCATION_DESCENDING 1 /* seven to zero */
unsigned char chan_allocation_order;