Merge branch 'linus' into x86/defconfig

8 files changed, 85 insertions, 228 deletions

diff --git a/include/linux/harrier_defs.h b/include/linux/harrier_defs.h
deleted file mode 100644
index efef11db790f..000000000000
--- a/include/linux/harrier_defs.h
+++ /dev/null
@@ -1,212 +0,0 @@
-/*
- * include/linux/harrier_defs.h
- *
- * Definitions for Motorola MCG Harrier North Bridge & Memory controller
- *
- * Author: Dale Farnsworth
- *         dale.farnsworth@mvista.com
- *
- * Extracted from asm-ppc/harrier.h by:
- * 	   Randy Vinson
- * 	   rvinson@mvista.com
- *
- * Copyright 2001-2002 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#ifndef __ASMPPC_HARRIER_DEFS_H
-#define __ASMPPC_HARRIER_DEFS_H
-
-#define HARRIER_DEFAULT_XCSR_BASE	0xfeff0000
-
-#define HARRIER_VEND_DEV_ID		0x1057480b
-
-#define HARRIER_VENI_OFF		0x00
-
-#define HARRIER_REVI_OFF		0x05
-#define HARRIER_UCTL_OFF		0xd0
-#define HARRIER_XTAL64_MASK		0x02
-
-#define HARRIER_MISC_CSR_OFF		0x1c
-#define HARRIER_RSTOUT			0x01000000
-#define HARRIER_SYSCON			0x08000000
-#define HARRIER_EREADY			0x10000000
-#define HARRIER_ERDYS			0x20000000
-
-/* Function exception registers */
-#define HARRIER_FEEN_OFF		0x40	/* enable */
-#define HARRIER_FEST_OFF		0x44	/* status */
-#define HARRIER_FEMA_OFF		0x48	/* mask */
-#define HARRIER_FECL_OFF		0x4c	/* clear */
-
-#define HARRIER_FE_DMA			0x80
-#define HARRIER_FE_MIDB			0x40
-#define HARRIER_FE_MIM0			0x20
-#define HARRIER_FE_MIM1			0x10
-#define HARRIER_FE_MIP			0x08
-#define HARRIER_FE_UA0			0x04
-#define HARRIER_FE_UA1			0x02
-#define HARRIER_FE_ABT			0x01
-
-#define HARRIER_SERIAL_0_OFF		0xc0
-
-#define HARRIER_MBAR_OFF		0xe0
-#define HARRIER_MBAR_MSK		0xfffc0000
-#define HARRIER_MPIC_CSR_OFF		0xe4
-#define HARRIER_MPIC_OPI_ENABLE		0x40
-#define HARRIER_MPIC_IFEVP_OFF		0x10200
-#define HARRIER_MPIC_IFEVP_VECT_MSK	0xff
-#define HARRIER_MPIC_IFEDE_OFF		0x10210
-
-/*
- * Define the Memory Controller register offsets.
- */
-#define HARRIER_SDBA_OFF		0x110
-#define HARRIER_SDBB_OFF		0x114
-#define HARRIER_SDBC_OFF		0x118
-#define HARRIER_SDBD_OFF		0x11c
-#define HARRIER_SDBE_OFF		0x120
-#define HARRIER_SDBF_OFF		0x124
-#define HARRIER_SDBG_OFF		0x128
-#define HARRIER_SDBH_OFF		0x12c
-
-#define HARRIER_SDB_ENABLE		0x00000100
-#define HARRIER_SDB_SIZE_MASK		0xf
-#define HARRIER_SDB_SIZE_SHIFT		16
-#define HARRIER_SDB_BASE_MASK		0xff
-#define HARRIER_SDB_BASE_SHIFT		24
-
-/*
- * Define outbound register offsets.
- */
-#define HARRIER_OTAD0_OFF		0x220
-#define HARRIER_OTOF0_OFF		0x224
-#define HARRIER_OTAD1_OFF		0x228
-#define HARRIER_OTOF1_OFF		0x22c
-#define HARRIER_OTAD2_OFF		0x230
-#define HARRIER_OTOF2_OFF		0x234
-#define HARRIER_OTAD3_OFF		0x238
-#define HARRIER_OTOF3_OFF		0x23c
-
-#define HARRIER_OTADX_START_MSK		0xffff0000UL
-#define HARRIER_OTADX_END_MSK		0x0000ffffUL
-
-#define HARRIER_OTOFX_OFF_MSK		0xffff0000UL
-#define HARRIER_OTOFX_ENA		0x80UL
-#define HARRIER_OTOFX_WPE		0x10UL
-#define HARRIER_OTOFX_SGE		0x08UL
-#define HARRIER_OTOFX_RAE		0x04UL
-#define HARRIER_OTOFX_MEM		0x02UL
-#define HARRIER_OTOFX_IOM		0x01UL
-
-/*
- * Define generic message passing register offsets
- */
-/* Mirrored registers (visible from both PowerPC and PCI space) */
-#define HARRIER_XCSR_MP_BASE_OFF	0x290	/* base offset in XCSR space */
-#define HARRIER_PMEP_MP_BASE_OFF	0x100	/* base offset in PMEM space */
-#define HARRIER_MGOM0_OFF		0x00	/* outbound msg 0 */
-#define HARRIER_MGOM1_OFF		0x04	/* outbound msg 1 */
-#define HARRIER_MGOD_OFF		0x08	/* outbound doorbells */
-
-#define HARRIER_MGIM0_OFF		0x10	/* inbound msg 0 */
-#define HARRIER_MGIM1_OFF		0x14	/* inbound msg 1 */
-#define HARRIER_MGID_OFF		0x18	/* inbound doorbells */
-
-/* PowerPC-only registers */
-#define HARRIER_MGIDM_OFF		0x20	/* inbound doorbell mask */
-
-/* PCI-only registers */
-#define HARRIER_PMEP_MGST_OFF		0x20	/* (outbound) interrupt status */
-#define HARRIER_PMEP_MGMS_OFF		0x24	/* (outbound) interrupt mask */
-#define HARRIER_MG_OMI0			(1<<4)
-#define HARRIER_MG_OMI1			(1<<5)
-
-#define HARRIER_PMEP_MGODM_OFF		0x28	/* outbound doorbell mask */
-
-/*
- * Define PCI configuration space register offsets
- */
-#define HARRIER_XCSR_TO_PCFS_OFF	0x300
-
-/*
- * Define message passing attribute register offset
- */
-#define HARRIER_MPAT_OFF		0x44
-
-/*
- * Define inbound attribute register offsets.
- */
-#define HARRIER_ITSZ0_OFF		0x48
-#define HARRIER_ITAT0_OFF		0x4c
-
-#define HARRIER_ITSZ1_OFF		0x50
-#define HARRIER_ITAT1_OFF		0x54
-
-#define HARRIER_ITSZ2_OFF		0x58
-#define HARRIER_ITAT2_OFF		0x5c
-
-#define HARRIER_ITSZ3_OFF		0x60
-#define HARRIER_ITAT3_OFF		0x64
-
-/* inbound translation size constants */
-#define HARRIER_ITSZ_MSK		0xff
-#define HARRIER_ITSZ_4KB		0x00
-#define HARRIER_ITSZ_8KB		0x01
-#define HARRIER_ITSZ_16KB		0x02
-#define HARRIER_ITSZ_32KB		0x03
-#define HARRIER_ITSZ_64KB		0x04
-#define HARRIER_ITSZ_128KB		0x05
-#define HARRIER_ITSZ_256KB		0x06
-#define HARRIER_ITSZ_512KB		0x07
-#define HARRIER_ITSZ_1MB		0x08
-#define HARRIER_ITSZ_2MB		0x09
-#define HARRIER_ITSZ_4MB		0x0A
-#define HARRIER_ITSZ_8MB		0x0B
-#define HARRIER_ITSZ_16MB		0x0C
-#define HARRIER_ITSZ_32MB		0x0D
-#define HARRIER_ITSZ_64MB		0x0E
-#define HARRIER_ITSZ_128MB		0x0F
-#define HARRIER_ITSZ_256MB		0x10
-#define HARRIER_ITSZ_512MB		0x11
-#define HARRIER_ITSZ_1GB		0x12
-#define HARRIER_ITSZ_2GB		0x13
-
-/* inbound translation offset */
-#define HARRIER_ITOF_SHIFT		0x10
-#define HARRIER_ITOF_MSK		0xffff
-
-/* inbound translation atttributes */
-#define HARRIER_ITAT_PRE		(1<<3)
-#define HARRIER_ITAT_RAE		(1<<4)
-#define HARRIER_ITAT_WPE		(1<<5)
-#define HARRIER_ITAT_MEM		(1<<6)
-#define HARRIER_ITAT_ENA		(1<<7)
-#define HARRIER_ITAT_GBL		(1<<16)
-
-#define HARRIER_LBA_OFF			0x80
-#define HARRIER_LBA_MSK			(1<<31)
-
-#define HARRIER_XCSR_SIZE		1024
-
-/* macros to calculate message passing register offsets */
-#define HARRIER_MP_XCSR(x) ((u32)HARRIER_XCSR_MP_BASE_OFF + (u32)x)
-
-#define HARRIER_MP_PMEP(x) ((u32)HARRIER_PMEP_MP_BASE_OFF + (u32)x)
-
-/*
- * Define PCI configuration space register offsets
- */
-#define HARRIER_MPBAR_OFF		PCI_BASE_ADDRESS_0
-#define HARRIER_ITBAR0_OFF		PCI_BASE_ADDRESS_1
-#define HARRIER_ITBAR1_OFF		PCI_BASE_ADDRESS_2
-#define HARRIER_ITBAR2_OFF		PCI_BASE_ADDRESS_3
-#define HARRIER_ITBAR3_OFF		PCI_BASE_ADDRESS_4
-
-#define HARRIER_XCSR_CONFIG(x) ((u32)HARRIER_XCSR_TO_PCFS_OFF + (u32)x)
-
-#endif				/* __ASMPPC_HARRIER_DEFS_H */
diff --git a/include/linux/mfd/t7l66xb.h b/include/linux/mfd/t7l66xb.h
new file mode 100644
index 000000000000..e83c7f2036f9
--- /dev/null
+++ b/include/linux/mfd/t7l66xb.h
@@ -0,0 +1,36 @@
+/*
+ * This file contains the definitions for the T7L66XB
+ *
+ * (C) Copyright 2005 Ian Molton <spyro@f2s.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#ifndef MFD_T7L66XB_H
+#define MFD_T7L66XB_H
+
+#include <linux/mfd/core.h>
+#include <linux/mfd/tmio.h>
+
+struct t7l66xb_platform_data {
+	int (*enable_clk32k)(struct platform_device *dev);
+	void (*disable_clk32k)(struct platform_device *dev);
+	int (*enable)(struct platform_device *dev);
+	int (*disable)(struct platform_device *dev);
+	int (*suspend)(struct platform_device *dev);
+	int (*resume)(struct platform_device *dev);
+
+	int irq_base; /* The base for subdevice irqs */
+
+	struct tmio_nand_data *nand_data;
+};
+
+
+#define IRQ_T7L66XB_MMC        (1)
+#define IRQ_T7L66XB_NAND       (3)
+
+#define T7L66XB_NR_IRQS	8
+
+#endif
diff --git a/include/linux/mfd/tc6387xb.h b/include/linux/mfd/tc6387xb.h
new file mode 100644
index 000000000000..fa06e0610b8e
--- /dev/null
+++ b/include/linux/mfd/tc6387xb.h
@@ -0,0 +1,23 @@
+/*
+ * This file contains the definitions for the TC6387XB
+ *
+ * (C) Copyright 2005 Ian Molton <spyro@f2s.com>
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ */
+#ifndef MFD_TC6387XB_H
+#define MFD_TC6387XB_H
+
+struct tc6387xb_platform_data {
+	int (*enable_clk32k)(struct platform_device *dev);
+	void (*disable_clk32k)(struct platform_device *dev);
+
+	int (*enable)(struct platform_device *dev);
+	int (*disable)(struct platform_device *dev);
+	int (*suspend)(struct platform_device *dev);
+	int (*resume)(struct platform_device *dev);
+};
+
+#endif
diff --git a/include/linux/mfd/tc6393xb.h b/include/linux/mfd/tc6393xb.h
index 7cc824a58f7c..fec7b3f7a81f 100644
--- a/include/linux/mfd/tc6393xb.h
+++ b/include/linux/mfd/tc6393xb.h
@@ -14,8 +14,8 @@
  * published by the Free Software Foundation.
  */
 
-#ifndef TC6393XB_H
-#define TC6393XB_H
+#ifndef MFD_TC6393XB_H
+#define MFD_TC6393XB_H
 
 /* Also one should provide the CK3P6MI clock */
 struct tc6393xb_platform_data {
@@ -29,7 +29,7 @@ struct tc6393xb_platform_data {
 	int	(*suspend)(struct platform_device *dev);
 	int	(*resume)(struct platform_device *dev);
 
-	int	irq_base;	/* a base for cascaded irq */
+	int	irq_base;	/* base for subdevice irqs */
 	int	gpio_base;
 
 	struct tmio_nand_data	*nand_data;
@@ -40,9 +40,6 @@ struct tc6393xb_platform_data {
  */
 #define	IRQ_TC6393_NAND		0
 #define	IRQ_TC6393_MMC		1
-#define	IRQ_TC6393_OHCI		2
-#define	IRQ_TC6393_SERIAL	3
-#define	IRQ_TC6393_FB		4
 
 #define	TC6393XB_NR_IRQS	8
 
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
index 9438d8c9ac1c..ec612e66391c 100644
--- a/include/linux/mfd/tmio.h
+++ b/include/linux/mfd/tmio.h
@@ -1,6 +1,21 @@
 #ifndef MFD_TMIO_H
 #define MFD_TMIO_H
 
+#define tmio_ioread8(addr) readb(addr)
+#define tmio_ioread16(addr) readw(addr)
+#define tmio_ioread16_rep(r, b, l) readsw(r, b, l)
+#define tmio_ioread32(addr) \
+	(((u32) readw((addr))) | (((u32) readw((addr) + 2)) << 16))
+
+#define tmio_iowrite8(val, addr) writeb((val), (addr))
+#define tmio_iowrite16(val, addr) writew((val), (addr))
+#define tmio_iowrite16_rep(r, b, l) writesw(r, b, l)
+#define tmio_iowrite32(val, addr) \
+	do { \
+	writew((val),       (addr)); \
+	writew((val) >> 16, (addr) + 2); \
+	} while (0)
+
 /*
  * data for the NAND controller
  */
@@ -10,8 +25,4 @@ struct tmio_nand_data {
 	unsigned int		num_partitions;
 };
 
-#define TMIO_NAND_CONFIG	"tmio-nand-config"
-#define TMIO_NAND_CONTROL	"tmio-nand-control"
-#define TMIO_NAND_IRQ		"tmio-nand"
-
 #endif
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 825be3878f68..c0e14008a3c2 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -641,6 +641,7 @@ int pci_restore_state(struct pci_dev *dev);
 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
+void pci_pme_active(struct pci_dev *dev, bool enable);
 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
 pci_power_t pci_target_state(struct pci_dev *dev);
 int pci_prepare_to_sleep(struct pci_dev *dev);
@@ -680,10 +681,12 @@ void pci_enable_bridges(struct pci_bus *bus);
 /* Proper probing supporting hot-pluggable devices */
 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
 				       const char *mod_name);
-static inline int __must_check pci_register_driver(struct pci_driver *driver)
-{
-	return __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME);
-}
+
+/*
+ * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
+ */
+#define pci_register_driver(driver)		\
+	__pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
 
 void pci_unregister_driver(struct pci_driver *dev);
 void pci_remove_behind_bridge(struct pci_dev *dev);
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 35a78415accc..9ec2bcce8e83 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2177,8 +2177,6 @@
 #define PCI_DEVICE_ID_HERC_WIN		0x5732
 #define PCI_DEVICE_ID_HERC_UNI		0x5832
 
-#define PCI_VENDOR_ID_RDC		0x17f3
-
 #define PCI_VENDOR_ID_SITECOM		0x182d
 #define PCI_DEVICE_ID_SITECOM_DC105V2	0x3069
 
diff --git a/include/linux/slub_def.h b/include/linux/slub_def.h
index 5bad61a93f65..2f5c16b1aacd 100644
--- a/include/linux/slub_def.h
+++ b/include/linux/slub_def.h
@@ -46,6 +46,7 @@ struct kmem_cache_cpu {
 struct kmem_cache_node {
 	spinlock_t list_lock;	/* Protect partial list and nr_partial */
 	unsigned long nr_partial;
+	unsigned long min_partial;
 	struct list_head partial;
 #ifdef CONFIG_SLUB_DEBUG
 	atomic_long_t nr_slabs;