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| author | Takashi Iwai <tiwai@suse.de> | 2022-09-22 13:54:20 +0200 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2022-09-22 13:54:20 +0200 |
| commit | af45a0d32df9c8f5abbbc7401d70ffa296c8cef6 (patch) | |
| tree | f162ece8fa7d94374d15801d614849db649282ac /include/soc | |
| parent | b5eee17cf7ddaf7b29a031b2c48277038e7a171a (diff) | |
| parent | c35fbea48659ec99a4f532c9ee9e8692405afdd0 (diff) | |
Merge branch 'for-linus' into for-next
Diffstat (limited to 'include/soc')
| -rw-r--r-- | include/soc/at91/sama7-ddr.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/soc/at91/sama7-ddr.h b/include/soc/at91/sama7-ddr.h index 9e17247474fa..6ce3bd22f6c6 100644 --- a/include/soc/at91/sama7-ddr.h +++ b/include/soc/at91/sama7-ddr.h @@ -38,6 +38,14 @@ #define DDR3PHY_DSGCR_ODTPDD_ODT0 (1 << 20) /* ODT[0] Power Down Driver */ #define DDR3PHY_ZQ0SR0 (0x188) /* ZQ status register 0 */ +#define DDR3PHY_ZQ0SR0_PDO_OFF (0) /* Pull-down output impedance select offset */ +#define DDR3PHY_ZQ0SR0_PUO_OFF (5) /* Pull-up output impedance select offset */ +#define DDR3PHY_ZQ0SR0_PDODT_OFF (10) /* Pull-down on-die termination impedance select offset */ +#define DDR3PHY_ZQ0SRO_PUODT_OFF (15) /* Pull-up on-die termination impedance select offset */ + +#define DDR3PHY_DX0DLLCR (0x1CC) /* DDR3PHY DATX8 DLL Control Register */ +#define DDR3PHY_DX1DLLCR (0x20C) /* DDR3PHY DATX8 DLL Control Register */ +#define DDR3PHY_DXDLLCR_DLLDIS (1 << 31) /* DLL Disable */ /* UDDRC */ #define UDDRC_STAT (0x04) /* UDDRC Operating Mode Status Register */ |