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authorLukas Gerlach <lukas.gerlach@cispa.de>2026-03-03 15:19:44 +0100
committerAnup Patel <anup@brainfault.org>2026-03-06 11:20:30 +0530
commit2dda6a9e09ee4f3c30ea72ba949a6ea781205e3a (patch)
tree33039adddbf86361f02c59016974368740216eec /include/uapi/linux/netdev.h
parent8f0c15c4b14f27dd9bd35971adb9c908241f2f63 (diff)
KVM: riscv: Fix Spectre-v1 in PMU counter access
Guest-controlled counter indices received via SBI ecalls are used to index into the PMC array. Sanitize them with array_index_nospec() to prevent speculative out-of-bounds access. Similar to x86 commit 13c5183a4e64 ("KVM: x86: Protect MSR-based index computations in pmu.h from Spectre-v1/L1TF attacks"). Fixes: 8f0153ecd3bf ("RISC-V: KVM: Add skeleton support for perf") Reviewed-by: Radim Krčmář <radim.krcmar@oss.qualcomm.com> Signed-off-by: Lukas Gerlach <lukas.gerlach@cispa.de> Link: https://lore.kernel.org/r/20260303-kvm-riscv-spectre-v1-v2-4-192caab8e0dc@cispa.de Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'include/uapi/linux/netdev.h')
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