Merge branch 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux into drm-next

First feature request for 4.16.  Highlights:
- RV and Vega header cleanups
- TTM operation context support
- 48 bit GPUVM fixes for Vega/RV
- More smatch fixes
- ECC support for vega10
- Resizeable BAR support
- Multi-display sync support in DC
- SR-IOV fixes
- Various scheduler improvements
- GPU reset fixes and vram lost tracking
- Clean up DC/powerplay interfaces
- DCN display fixes
- Various DC fixes

* 'drm-next-4.16' of git://people.freedesktop.org/~agd5f/linux: (291 commits)
  drm/radeon: Use drm_fb_helper_lastclose() and _poll_changed()
  drm/amdgpu: Use drm_fb_helper_lastclose() and _poll_changed()
  drm/amd/display: Use drm_fb_helper_poll_changed()
  drm/ttm: swap consecutive allocated pooled pages v4
  drm/amdgpu: fix amdgpu_sync_resv v2
  drm/ttm: swap consecutive allocated cached pages v3
  drm/amd/amdgpu: set gtt size according to system memory size only
  drm/amdgpu: Get rid of dep_sync as a seperate object.
  drm/amdgpu: allow specifying vm_block_size for multi level PDs v2
  drm/amdgpu: move validation of the VM size into the VM code
  drm/amdgpu: allow non pot VM size values
  drm/amdgpu: choose number of VM levels based on VM size
  drm/amdgpu: unify VM size handling of Vega10 with older generation
  drm/amdgpu: fix amdgpu_vm_num_entries
  drm/amdgpu: fix VM PD addr shift
  drm/amdgpu: correct vce4.0 fw config for SRIOV (V2)
  drm/amd/display: Don't call dm_log_to_buffer directly in dc_conn_log
  drm/amd/display: Add dm_logger_append_va API
  drm/ttm: Use a static string instead of an array of char *
  drm/amd/display: remove usage of legacy_cursor_update
  ...

1 files changed, 12 insertions, 0 deletions

diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 919248fb4028..4d21191aaed0 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -160,6 +160,7 @@ union drm_amdgpu_bo_list {
 #define AMDGPU_CTX_OP_ALLOC_CTX	1
 #define AMDGPU_CTX_OP_FREE_CTX	2
 #define AMDGPU_CTX_OP_QUERY_STATE	3
+#define AMDGPU_CTX_OP_QUERY_STATE2	4
 
 /* GPU reset status */
 #define AMDGPU_CTX_NO_RESET		0
@@ -170,6 +171,13 @@ union drm_amdgpu_bo_list {
 /* unknown cause */
 #define AMDGPU_CTX_UNKNOWN_RESET	3
 
+/* indicate gpu reset occured after ctx created */
+#define AMDGPU_CTX_QUERY2_FLAGS_RESET    (1<<0)
+/* indicate vram lost occured after ctx created */
+#define AMDGPU_CTX_QUERY2_FLAGS_VRAMLOST (1<<1)
+/* indicate some job from this context once cause gpu hang */
+#define AMDGPU_CTX_QUERY2_FLAGS_GUILTY   (1<<2)
+
 /* Context priority level */
 #define AMDGPU_CTX_PRIORITY_UNSET       -2048
 #define AMDGPU_CTX_PRIORITY_VERY_LOW    -1023
@@ -869,6 +877,10 @@ struct drm_amdgpu_info_device {
 	__u32 _pad1;
 	/* always on cu bitmap */
 	__u32 cu_ao_bitmap[4][4];
+	/** Starting high virtual address for UMDs. */
+	__u64 high_va_offset;
+	/** The maximum high virtual address */
+	__u64 high_va_max;
 };
 
 struct drm_amdgpu_info_hw_ip {