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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-11-26 19:05:19 -0800
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-11-26 19:05:19 -0800
commit552d2f841e3f0f45eac86ff93e230db0b0a67a99 (patch)
treec47fabd409b3dd92965017dfc1c82df1d35579a0 /include
parent09cfd929860532f95c9944d39abbb043b8082f36 (diff)
parentb1e3afa001db8845eb60981f6ab925503ed94e53 (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] vpe: Add missing "space" [MIPS] Compliment va_start() with va_end(). [MIPS] IP22: Fix broken eeprom access by using __raw_readl/__raw_writel [MIPS] IP22: Fix broken EISA interrupt setup by switching to generic i8259 [MIPS] 64-bit Sibyte kernels need DMA32. [MIPS] Only build r4k clocksource for systems that work ok with it. [MIPS] Handle R4000/R4400 mfc0 from count register. [MIPS] Fix possible hang in LL/SC futex loops. [MIPS] Fix context DSP context / TLS pointer switching bug for new threads. [MIPS] IP32: More interrupt renumbering fixes. [MIPS] time: MIPSsim's plat_time_init doesn't need to be irq safe. [MIPS] time: Fix negated condition in cevt-r4k driver. [MIPS] Fix pcspeaker build.
Diffstat (limited to 'include')
-rw-r--r--include/asm-mips/8253pit.h10
-rw-r--r--include/asm-mips/dma.h1
-rw-r--r--include/asm-mips/futex.h6
-rw-r--r--include/asm-mips/i8253.h2
-rw-r--r--include/asm-mips/ip32/ip32_ints.h2
-rw-r--r--include/asm-mips/system.h8
-rw-r--r--include/asm-mips/time.h16
7 files changed, 27 insertions, 18 deletions
diff --git a/include/asm-mips/8253pit.h b/include/asm-mips/8253pit.h
deleted file mode 100644
index 285f78488ccb..000000000000
--- a/include/asm-mips/8253pit.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- * 8253/8254 Programmable Interval Timer
- */
-
-#ifndef _8253PIT_H
-#define _8253PIT_H
-
-#define PIT_TICK_RATE 1193182UL
-
-#endif
diff --git a/include/asm-mips/dma.h b/include/asm-mips/dma.h
index 833437d31ef1..d6a6c21f16db 100644
--- a/include/asm-mips/dma.h
+++ b/include/asm-mips/dma.h
@@ -92,6 +92,7 @@
#define MAX_DMA_ADDRESS (PAGE_OFFSET + 0x01000000)
#endif
#define MAX_DMA_PFN PFN_DOWN(virt_to_phys((void *)MAX_DMA_ADDRESS))
+#define MAX_DMA32_PFN (1UL << (32 - PAGE_SHIFT))
/* 8237 DMA controllers */
#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */
diff --git a/include/asm-mips/futex.h b/include/asm-mips/futex.h
index 3e7e30d4f418..17f082cfea85 100644
--- a/include/asm-mips/futex.h
+++ b/include/asm-mips/futex.h
@@ -35,7 +35,7 @@
" .set mips0 \n" \
" .section .fixup,\"ax\" \n" \
"4: li %0, %6 \n" \
- " j 2b \n" \
+ " j 3b \n" \
" .previous \n" \
" .section __ex_table,\"a\" \n" \
" "__UA_ADDR "\t1b, 4b \n" \
@@ -61,7 +61,7 @@
" .set mips0 \n" \
" .section .fixup,\"ax\" \n" \
"4: li %0, %6 \n" \
- " j 2b \n" \
+ " j 3b \n" \
" .previous \n" \
" .section __ex_table,\"a\" \n" \
" "__UA_ADDR "\t1b, 4b \n" \
@@ -200,4 +200,4 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
}
#endif
-#endif
+#endif /* _ASM_FUTEX_H */
diff --git a/include/asm-mips/i8253.h b/include/asm-mips/i8253.h
index 032ca73f181b..5dabc870b322 100644
--- a/include/asm-mips/i8253.h
+++ b/include/asm-mips/i8253.h
@@ -12,6 +12,8 @@
#define PIT_CH0 0x40
#define PIT_CH2 0x42
+#define PIT_TICK_RATE 1193182UL
+
extern spinlock_t i8253_lock;
extern void setup_pit_timer(void);
diff --git a/include/asm-mips/ip32/ip32_ints.h b/include/asm-mips/ip32/ip32_ints.h
index ab5612f90f6f..85bc5302bce0 100644
--- a/include/asm-mips/ip32/ip32_ints.h
+++ b/include/asm-mips/ip32/ip32_ints.h
@@ -22,7 +22,7 @@ enum ip32_irq_no {
* CPU interrupts are 0 ... 7
*/
- CRIME_IRQ_BASE = MIPS_CPU_IRQ_BASE,
+ CRIME_IRQ_BASE = MIPS_CPU_IRQ_BASE + 8,
/*
* MACE
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 90e4b403f531..1030562d6ea6 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -68,11 +68,15 @@ do { \
if (cpu_has_dsp) \
__save_dsp(prev); \
(last) = resume(prev, next, task_thread_info(next)); \
+} while (0)
+
+#define finish_arch_switch(prev) \
+do { \
if (cpu_has_dsp) \
__restore_dsp(current); \
if (cpu_has_userlocal) \
- write_c0_userlocal(task_thread_info(current)->tp_value);\
-} while(0)
+ write_c0_userlocal(current_thread_info()->tp_value); \
+} while (0)
static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
{
diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h
index ee1663e64da1..7717934f94c3 100644
--- a/include/asm-mips/time.h
+++ b/include/asm-mips/time.h
@@ -58,10 +58,22 @@ extern int (*perf_irq)(void);
* Initialize the calling CPU's compare interrupt as clockevent device
*/
#ifdef CONFIG_CEVT_R4K
-extern void mips_clockevent_init(void);
+extern int mips_clockevent_init(void);
extern unsigned int __weak get_c0_compare_int(void);
#else
-static inline void mips_clockevent_init(void)
+static inline int mips_clockevent_init(void)
+{
+ return -ENXIO;
+}
+#endif
+
+/*
+ * Initialize the count register as a clocksource
+ */
+#ifdef CONFIG_CEVT_R4K
+extern void init_mips_clocksource(void);
+#else
+static inline void init_mips_clocksource(void)
{
}
#endif