diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2025-09-23 23:04:23 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2025-09-23 23:04:25 +0200 |
| commit | 1cdfe53d5798cbad2a1e67a108e8b3a4ef08edfb (patch) | |
| tree | 3d2f8fce14184f8986e5248b7133c59c753156b1 /include | |
| parent | 9685b2975972640a98f682462ea0741757c13294 (diff) | |
| parent | 747436750bc0ef73be32391bd5d0d7dcd185da7f (diff) | |
Merge tag 'at91-soc-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/arm
Microchip arm-soc updates for v6.18
This update includes:
- low priority fixes to the PM code, in relation to recent addition of
sam9x75 or sama7d65 SoCs
- removal of the 2.5V regulator for low power modes since this is
no longer supported
* tag 'at91-soc-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: at91: pm: Remove 2.5V regulator
ARM: at91: pm: save and restore ACR during PLL disable/enable
ARM: at91: pm: fix MCKx restore routine
ARM: at91: pm: fix .uhp_udp_mask specification for current SoCs
Link: https://lore.kernel.org/r/20250916150328.27015-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/soc/at91/sama7-sfrbu.h | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/include/soc/at91/sama7-sfrbu.h b/include/soc/at91/sama7-sfrbu.h index 76b740810d34..8cee48d1ae2c 100644 --- a/include/soc/at91/sama7-sfrbu.h +++ b/include/soc/at91/sama7-sfrbu.h @@ -18,13 +18,6 @@ #define AT91_SFRBU_PSWBU_SOFTSWITCH (1 << 1) /* Power switch BU source selection */ #define AT91_SFRBU_PSWBU_CTRL (1 << 0) /* Power switch BU control */ -#define AT91_SFRBU_25LDOCR (0x0C) /* SFRBU 2.5V LDO Control Register */ -#define AT91_SFRBU_25LDOCR_LDOANAKEY (0x3B6E18 << 8) /* Specific value mandatory to allow writing of other register bits. */ -#define AT91_SFRBU_25LDOCR_STATE (1 << 3) /* LDOANA Switch On/Off Control */ -#define AT91_SFRBU_25LDOCR_LP (1 << 2) /* LDOANA Low-Power Mode Control */ -#define AT91_SFRBU_PD_VALUE_MSK (0x3) -#define AT91_SFRBU_25LDOCR_PD_VALUE(v) ((v) & AT91_SFRBU_PD_VALUE_MSK) /* LDOANA Pull-down value */ - #define AT91_FRBU_DDRPWR (0x10) /* SFRBU DDR Power Control Register */ #define AT91_FRBU_DDRPWR_STATE (1 << 0) /* DDR Power Mode State */ |