diff options
| author | David S. Miller <davem@davemloft.net> | 2021-02-11 14:55:04 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2021-02-11 14:55:04 -0800 |
| commit | 1d1311516a5d104eed3f0983e111bd1aaeb00543 (patch) | |
| tree | 0fce23ded2cff9ff207df50e0c9a7f80cb68ed98 /include | |
| parent | cc6216ba56f36dea38e39540bc5a942128c08dda (diff) | |
| parent | 3ad3f8f93c81f81d6e28b2e286b03669cc1fb3b0 (diff) | |
Merge branch 'marvell-cn10k'
Geetha sowjanya says:
====================
Add Marvell CN10K support
The current admin function (AF) driver and the netdev driver supports
OcteonTx2 silicon variants. The same OcteonTx2's
Resource Virtualization Unit (RVU) is carried forward to the next-gen
silicon ie OcteonTx3, with some changes and feature enhancements.
This patch set adds support for OcteonTx3 (CN10K) silicon and gets
the drivers to the same level as OcteonTx2. No new OcteonTx3 specific
features are added.
Changes cover below HW level differences
- PCIe BAR address changes wrt shared mailbox memory region
- Receive buffer freeing to HW
- Transmit packet's descriptor submission to HW
- Programmable HW interface identifiers (channels)
- Increased MTU support
- A Serdes MAC block (RPM) configuration
v5-v6
Rebased on top of latest net-next branch.
v4-v5
Fixed sparse warnings.
v3-v4
Fixed compiler warnings.
v2-v3
Reposting as a single thread.
Rebased on top latest net-next branch.
v1-v2
Fixed check-patch reported issues.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/soc/marvell/octeontx2/asm.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/linux/soc/marvell/octeontx2/asm.h b/include/linux/soc/marvell/octeontx2/asm.h index ae2279fe830a..28c04d918f0f 100644 --- a/include/linux/soc/marvell/octeontx2/asm.h +++ b/include/linux/soc/marvell/octeontx2/asm.h @@ -22,8 +22,16 @@ : [rs]"r" (ioaddr)); \ (result); \ }) +#define cn10k_lmt_flush(val, addr) \ +({ \ + __asm__ volatile(".cpu generic+lse\n" \ + "steor %x[rf],[%[rs]]" \ + : [rf]"+r"(val) \ + : [rs]"r"(addr)); \ +}) #else #define otx2_lmt_flush(ioaddr) ({ 0; }) +#define cn10k_lmt_flush(val, addr) ({ addr = val; }) #endif #endif /* __SOC_OTX2_ASM_H */ |