diff options
| author | Maher Sanalla <msanalla@nvidia.com> | 2026-05-24 18:38:04 +0300 |
|---|---|---|
| committer | Leon Romanovsky <leon@kernel.org> | 2026-06-11 07:02:05 -0400 |
| commit | 29e0a014ddfbdbd6b02684304dddbcf9161034ae (patch) | |
| tree | 4f31c8a6f7a1435bd27bfb640f52bf714c8a3d7c /include | |
| parent | e1008f19fa977d5b7c3912420e3b46b0a33e5316 (diff) | |
RDMA/mlx5: Add support for rate limit in UD and UC QPs
Rate limiting is currently supported only for raw packet QPs, where
the packet pacing index is programmed into the SQC during SQ modify.
Extend rate limit support to UD and UC QPs by setting the pacing
index in the QPC during RTR2RTS and RTS2RTS transitions.
Signed-off-by: Maher Sanalla <msanalla@nvidia.com>
Reviewed-by: Michael Guralnik <michaelgur@nvidia.com>
Signed-off-by: Edward Srouji <edwards@nvidia.com>
Link: https://patch.msgid.link/20260524-packet-pacing-v1-3-3d79439f8d08@nvidia.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/mlx5/qp.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/mlx5/qp.h b/include/linux/mlx5/qp.h index d67aedc6ea68..40f889403b07 100644 --- a/include/linux/mlx5/qp.h +++ b/include/linux/mlx5/qp.h @@ -72,6 +72,7 @@ enum mlx5_qp_optpar { MLX5_QP_OPTPAR_CQN_RCV = 1 << 19, MLX5_QP_OPTPAR_DC_HS = 1 << 20, MLX5_QP_OPTPAR_DC_KEY = 1 << 21, + MLX5_QP_OPTPAR_PP_INDEX = 1 << 22, MLX5_QP_OPTPAR_COUNTER_SET_ID = 1 << 25, }; |