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| author | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2019-11-07 13:48:31 +0100 |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2019-11-07 13:48:31 +0100 |
| commit | 2b328421e4ed1a8dca6261d302ec0b7c9f915a5b (patch) | |
| tree | 7238e03f5a06c48913a95ba763f6f050b8ee50c8 /include | |
| parent | c389ec67b7f8e028438643c4af4bbff550192187 (diff) | |
| parent | fee22854c0273569836de2039d9c432ea4df2cfc (diff) | |
Merge tag 'devfreq-next-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux
Pull devfreq updates for v5.5 from Chanwoo Choi:
"1. Update devfreq core
- Check NULL governor in available_governors_show sysfs in order to prevent
showing wrong governor information.
- Fix race condition between devfreq_update_status() and trans_stat_show()
- Add new 'interrupt-driven' flag for devfreq goveroris. Each devfreq driver can
add their own interrupt-driven governor (NIVIDIA Tegra30 ACTMON governor). It
needs to use the following sysfs interface to get the new polling interval in
order to change the NVIDIA Tegra30 hardware's polling interval.
: /sys/class/devfreq/devfreqX/polling_interval
So, if 'interrupt-driven' flag of devfreq governor is 1, the devfreq governor
is able to use the 'polling_interval' sysfs interface to get the new polling
interval value. But, the devfreq core doesn't schedule out the polling work
for this governor like NVIDIA Tegra30 ACTMON governor.
2. Update devfreq drivers
- For exynos-bus.c, remove unused property from dt-binding documentation
- For tegra30-devfreq.c, update the internal behavior like fixing the overflow
integer issue and clean-up code.
3. Update devfreq-event driver
- For exynos-ppmu.c, add exynos_ppmu.h dt-binding file for 'event-data-type' filed.
and update dt-binging documentation. Also, Fix minor coding style."
* tag 'devfreq-next-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux: (25 commits)
PM / devfreq: tegra30: Tune up MCCPU boost-down coefficient
PM / devfreq: tegra30: Support variable polling interval
PM / devfreq: Add new interrupt_driven flag for governors
PM / devfreq: tegra30: Use kHz units for dependency threshold
PM / devfreq: tegra30: Disable consecutive interrupts when appropriate
PM / devfreq: tegra30: Don't enable already enabled consecutive interrupts
PM / devfreq: tegra30: Include appropriate header
PM / devfreq: tegra30: Constify structs
PM / devfreq: tegra30: Don't enable consecutive-down interrupt on startup
PM / devfreq: tegra30: Reset boosting on startup
PM / devfreq: tegra30: Move clk-notifier's registration to governor's start
PM / devfreq: tegra30: Use CPUFreq notifier
PM / devfreq: tegra30: Use kHz units uniformly in the code
PM / devfreq: tegra30: Fix integer overflow on CPU's freq max out
PM / devfreq: tegra30: Drop write-barrier
PM / devfreq: tegra30: Handle possible round-rate error
PM / devfreq: tegra30: Keep interrupt disabled while governor is stopped
PM / devfreq: tegra30: Change irq type to unsigned int
PM / devfreq: exynos-ppmu: remove useless assignment
PM / devfreq: Lock devfreq in trans_stat_show
...
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/pmu/exynos_ppmu.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/include/dt-bindings/pmu/exynos_ppmu.h b/include/dt-bindings/pmu/exynos_ppmu.h new file mode 100644 index 000000000000..8724abe130f3 --- /dev/null +++ b/include/dt-bindings/pmu/exynos_ppmu.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Samsung Exynos PPMU event types for counting in regs + * + * Copyright (c) 2019, Samsung Electronics + * Author: Lukasz Luba <l.luba@partner.samsung.com> + */ + +#ifndef __DT_BINDINGS_PMU_EXYNOS_PPMU_H +#define __DT_BINDINGS_PMU_EXYNOS_PPMU_H + +#define PPMU_RO_BUSY_CYCLE_CNT 0x0 +#define PPMU_WO_BUSY_CYCLE_CNT 0x1 +#define PPMU_RW_BUSY_CYCLE_CNT 0x2 +#define PPMU_RO_REQUEST_CNT 0x3 +#define PPMU_WO_REQUEST_CNT 0x4 +#define PPMU_RO_DATA_CNT 0x5 +#define PPMU_WO_DATA_CNT 0x6 +#define PPMU_RO_LATENCY 0x12 +#define PPMU_WO_LATENCY 0x16 +#define PPMU_V2_RO_DATA_CNT 0x4 +#define PPMU_V2_WO_DATA_CNT 0x5 +#define PPMU_V2_EVT3_RW_DATA_CNT 0x22 + +#endif |
