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| author | Roy Luo <royluo@google.com> | 2025-12-18 19:23:10 +0000 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-12-23 15:31:31 +0100 |
| commit | 32bc790a8e495c5c22755644c3e26a7aee03f91f (patch) | |
| tree | aef1fdf87c07483ecc14ab2015bfd9225425cb38 /include | |
| parent | e715bc42e337b6f54ada7262e1bbc0b7860525c2 (diff) | |
dt-bindings: usb: dwc3: Add Google Tensor G5 DWC3
Document the device tree bindings for the DWC3 USB controller found in
Google Tensor SoCs, starting with the G5 generation (codename: laguna).
The Tensor G5 silicon represents a complete architectural departure from
previous generations (like gs101), including entirely new clock/reset
schemes, top-level wrapper and register interface. Consequently,
existing Samsung/Exynos DWC3 USB bindings are incompatible, necessitating
this new device tree binding.
The USB controller on Tensor G5 is based on Synopsys DWC3 IP and features
Dual-Role Device single port with hibernation support.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Roy Luo <royluo@google.com>
Link: https://patch.msgid.link/20251218-controller-v10-1-4047c9077274@google.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions