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| author | Stephen Boyd <sboyd@kernel.org> | 2021-07-31 00:57:03 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2021-07-31 00:57:03 -0700 |
| commit | 5f1fc9726ff7936f5606eac7f57e4ff856ca14b6 (patch) | |
| tree | 6f764e15316cb08aebfae30348766a06c9029f87 /include | |
| parent | 2734d6c1b1a089fb593ef6a23d4b70903526fe0c (diff) | |
| parent | d28b1e03dc8d1070538ca3ea3f4e6732109ddf42 (diff) | |
Merge tag 'renesas-clk-for-v5.15-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Add display (DU and DSI) clocks on R-Car V3U
- Add I2C, DMAC, USB, sound (SSIF-2), GPIO, CANFD, and ADC clocks and
resets on RZ/G2L
- Miscellaneous fixes and improvements
* tag 'renesas-clk-for-v5.15-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: r9a07g044: Add entry for fixed clock P0_DIV2
dt-bindings: clock: r9a07g044-cpg: Add entry for P0_DIV2 core clock
clk: renesas: r9a07g044: Add clock and reset entries for ADC
clk: renesas: r9a07g044: Add clock and reset entries for CANFD
clk: renesas: Rename renesas-rzg2l-cpg.[ch] to rzg2l-cpg.[ch]
clk: renesas: r9a07g044: Add GPIO clock and reset entries
clk: renesas: r9a07g044: Add SSIF-2 clock and reset entries
clk: renesas: r9a07g044: Add USB clocks/resets
clk: renesas: r9a07g044: Add DMAC clocks/resets
clk: renesas: r9a07g044: Add I2C clocks/resets
clk: renesas: r8a779a0: Add the DSI clocks
clk: renesas: r8a779a0: Add the DU clock
clk: renesas: rzg2: Rename i2c-dvfs to iic-pmic
clk: renesas: rzg2l: Fix off-by-one check in rzg2l_cpg_clk_src_twocell_get()
clk: renesas: rzg2l: Avoid mixing error pointers and NULL
clk: renesas: rzg2l: Fix a double free on error
clk: renesas: rzg2l: Fix return value and unused assignment
clk: renesas: rzg2l: Remove unneeded semicolon
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/r9a07g044-cpg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/r9a07g044-cpg.h b/include/dt-bindings/clock/r9a07g044-cpg.h index 0728ad07ff7a..0bb17ff1a01a 100644 --- a/include/dt-bindings/clock/r9a07g044-cpg.h +++ b/include/dt-bindings/clock/r9a07g044-cpg.h @@ -30,6 +30,7 @@ #define R9A07G044_CLK_P2 19 #define R9A07G044_CLK_AT 20 #define R9A07G044_OSCCLK 21 +#define R9A07G044_CLK_P0_DIV2 22 /* R9A07G044 Module Clocks */ #define R9A07G044_CA55_SCLK 0 |