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authorRafael J. Wysocki <rafael.j.wysocki@intel.com>2026-01-29 15:30:03 +0100
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2026-01-29 15:30:03 +0100
commit74dd4d1f4c7d2e49bbeb1374f1ebea95d963eac0 (patch)
tree5c72dd15804467a53d6e7cc4bbff53487b845f60 /include
parenta1fe789a96fe47733c133134fd264cb7ca832395 (diff)
parent0061030929e2d09398ade9fae320528bdcba2bed (diff)
Merge tag 'thermal-v7.0' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/thermal/linux
Pull thermal control updates for 6.20/7.0 from Daniel Lezcano: "- Fix CFLAGS and LDFLAGS in the pkg-config template fir the libthermal (Romain Gantois) - Support multiple temp to raw conversion functions for the Mediatek LVTS thermal driver and add the MT8196 and MT6991 support (Laura Nao) - Add support for the Mediatek LVTS driver for MT7987 (Frank Wunderlich) - Use the existing HZ_PER_MHZ macro on STM32 (Andy Shevchenko) - Use the existing clamp() macro in BCM2835 (Thorsten Blum) - Make the reset line optional in order to support new Renesas Soc where it is not available. Add the RZ/T2H and RZ/N2H suppport (Cosmin Tanislav)" * tag 'thermal-v7.0' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/thermal/linux: thermal: renesas: rzg3e: add support for RZ/T2H and RZ/N2H dt-bindings: thermal: r9a09g047-tsu: document RZ/T2H and RZ/N2H thermal: renesas: rzg3e: make calibration value retrieval per-chip thermal: renesas: rzg3e: make min and max temperature per-chip thermal: renesas: rzg3e: make reset optional dt-bindings: thermal: r9a09g047-tsu: Document RZ/V2N TSU thermal/drivers/broadcom: Use clamp to simplify bcm2835_thermal_temp2adc thermal/drivers/stm32: Use predefined HZ_PER_MHZ instead of a custom one thermal/drivers/mediatek/lvts_thermal: Add mt7987 support dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for MT7987 dt-bindings: nvmem: mediatek: efuse: Add support for MT8196 thermal/drivers/mediatek/lvts_thermal: Add MT8196 support thermal/drivers/mediatek/lvts: Support MSR offset for 16-bit calibration data thermal/drivers/mediatek/lvts: Add support for ATP mode thermal/drivers/mediatek/lvts: Add lvts_temp_to_raw variant thermal/drivers/mediatek/lvts: Add platform ops to support alternative conversion logic thermal/drivers/mediatek/lvts: Make number of calibration offsets configurable dt-bindings: thermal: mediatek: Add LVTS thermal controller support for MT8196 tools: lib: thermal: Correct CFLAGS and LDFLAGS in pkg-config template
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/thermal/mediatek,lvts-thermal.h29
1 files changed, 29 insertions, 0 deletions
diff --git a/include/dt-bindings/thermal/mediatek,lvts-thermal.h b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
index ddc7302a510a..350f98178b26 100644
--- a/include/dt-bindings/thermal/mediatek,lvts-thermal.h
+++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
@@ -7,6 +7,9 @@
#ifndef __MEDIATEK_LVTS_DT_H
#define __MEDIATEK_LVTS_DT_H
+#define MT7987_CPU 0
+#define MT7987_ETH2P5G 1
+
#define MT7988_CPU_0 0
#define MT7988_CPU_1 1
#define MT7988_ETH2P5G_0 2
@@ -80,4 +83,30 @@
#define MT8192_AP_MD1 15
#define MT8192_AP_MD2 16
+#define MT8196_MCU_MEDIUM_CPU6_0 0
+#define MT8196_MCU_MEDIUM_CPU6_1 1
+#define MT8196_MCU_DSU2 2
+#define MT8196_MCU_DSU3 3
+#define MT8196_MCU_LITTLE_CPU3 4
+#define MT8196_MCU_LITTLE_CPU0 5
+#define MT8196_MCU_LITTLE_CPU1 6
+#define MT8196_MCU_LITTLE_CPU2 7
+#define MT8196_MCU_MEDIUM_CPU4_0 8
+#define MT8196_MCU_MEDIUM_CPU4_1 9
+#define MT8196_MCU_MEDIUM_CPU5_0 10
+#define MT8196_MCU_MEDIUM_CPU5_1 11
+#define MT8196_MCU_DSU0 12
+#define MT8196_MCU_DSU1 13
+#define MT8196_MCU_BIG_CPU7_0 14
+#define MT8196_MCU_BIG_CPU7_1 15
+
+#define MT8196_AP_TOP0 0
+#define MT8196_AP_TOP1 1
+#define MT8196_AP_TOP2 2
+#define MT8196_AP_TOP3 3
+#define MT8196_AP_BOT0 4
+#define MT8196_AP_BOT1 5
+#define MT8196_AP_BOT2 6
+#define MT8196_AP_BOT3 7
+
#endif /* __MEDIATEK_LVTS_DT_H */