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authorSvyatoslav Ryhel <clamor95@gmail.com>2026-01-22 17:11:25 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2026-01-23 17:18:11 +0100
commit8acc379b664ec987dcc7eca25a5f5c4a9a4eb9c4 (patch)
treea7f689f320aca9acdfbabc31c148a19c901a2aea /include
parent53cc2d90542cfee42bf73627c26318372e7ea50e (diff)
usb: phy: tegra: add HSIC support
Add support for HSIC USB mode, which can be set for second USB controller and PHY on Tegra SoC along with already supported UTMI or ULPI. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Link: https://patch.msgid.link/20260122151125.7367-3-clamor95@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include')
-rw-r--r--include/linux/usb/tegra_usb_phy.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/usb/tegra_usb_phy.h b/include/linux/usb/tegra_usb_phy.h
index fb5227353d3b..6d57da13d395 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -23,6 +23,9 @@ struct gpio_desc;
* requires_extra_tuning_parameters: true if xcvr_hsslew, hssquelch_level
* and hsdiscon_level should be set for adequate signal quality
* requires_pmc_ao_power_up: true if USB AO is powered down by default
+ * uhsic_registers_shift: for Tegra30+ where HSIC registers were shifted
+ * comparing to Tegra20 by 0x400, since Tegra20 has no UTMIP on PHY2
+ * uhsic_tx_rtune: fine tuned 50 Ohm termination resistor for NMOS/PMOS driver
*/
struct tegra_phy_soc_config {
@@ -31,6 +34,8 @@ struct tegra_phy_soc_config {
bool requires_usbmode_setup;
bool requires_extra_tuning_parameters;
bool requires_pmc_ao_power_up;
+ u32 uhsic_registers_shift;
+ u32 uhsic_tx_rtune;
};
struct tegra_utmip_config {