diff options
| author | Dan Williams <dan.j.williams@intel.com> | 2025-12-15 16:56:13 -0800 |
|---|---|---|
| committer | Dave Jiang <dave.jiang@intel.com> | 2026-01-05 10:14:10 -0700 |
| commit | ae201a0092362ffdec7206efa1ec85e260fab8d2 (patch) | |
| tree | f64f9923a8f5f9f1eba67f241583f6285ab3d5f3 /include | |
| parent | 1f1cb7f0c25574cf51501f8c8cece0047d7e8848 (diff) | |
cxl/port: Arrange for always synchronous endpoint attach
Make it so that upon return from devm_cxl_add_endpoint() that
cxl_mem_probe() can assume that the endpoint has had a chance to complete
cxl_port_probe(). I.e. cxl_port module loading has completed prior to
device registration.
Delete the MODULE_SOFTDEP() as it is not sufficient for this purpose, but a
hard link-time dependency is reliable. Specifically MODULE_SOFTDEP() does
not guarantee that the module loading has completed prior to the completion
of the current module's init.
Cc: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
Cc: Alejandro Lucero <alucerop@amd.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Tested-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Ben Cheatham <benjamin.cheatham@amd.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Tested-by: Alejandro Lucero <alucerop@amd.com>
Link: https://patch.msgid.link/20251216005616.3090129-4-dan.j.williams@intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions
