diff options
| author | Stephen Boyd <sboyd@kernel.org> | 2021-02-04 11:49:12 -0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2021-02-04 11:49:12 -0800 |
| commit | c148c1bb2a6e9d62af3822569e85b25574e33fc5 (patch) | |
| tree | 8552246a7bdb526a1dfa68a7ad2d35392d020aa6 /include | |
| parent | 5c8fe583cce542aa0b84adc939ce85293de36e5e (diff) | |
| parent | de5774d192ba15539191ed8b0c79f3d52464b8e3 (diff) | |
Merge tag 'clk-imx-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-imx
Pull i.MX clk driver updates from Shawn Guo:
- Use pr_notice() instead of pr_warn() on i.MX6Q pre-boot ldb_di_clk
reparenting
- A couple of W=1 build warning fixes from Lee Jones
- A series from Liu Ying that adds some SCU clocks support for i.MX8qxp
DC0/MIPI-LVDS subsystems
- A series from Lucas Stach that adds PLL monitor clocks for i.MX8MQ,
and clkout1/2 support for i.MX8MM/MN
* tag 'clk-imx-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
clk: imx: Move 'imx6sl_set_wait_clk()'s prototype out to accessible header
clk: imx8mn: add clkout1/2 support
clk: imx8mm: add clkout1/2 support
clk: imx8mq: add PLL monitor output
clk: imx: clk-imx31: Remove unused static const table 'uart_clks'
clk: imx6q: demote warning about pre-boot ldb_di_clk reparenting
clk: imx: clk-imx8qxp: Add some SCU clocks support for MIPI-LVDS subsystems
clk: imx: clk-imx8qxp: Register DC0 display clocks with imx_clk_scu2()
clk: imx: clk-imx8qxp: Add SCU clocks support for DC0 bypass clocks
clk: imx: clk-imx8qxp: Add SCU clocks support for DC0 PLL clocks
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/imx8-clock.h | 2 | ||||
| -rw-r--r-- | include/dt-bindings/clock/imx8mm-clock.h | 10 | ||||
| -rw-r--r-- | include/dt-bindings/clock/imx8mn-clock.h | 9 | ||||
| -rw-r--r-- | include/dt-bindings/clock/imx8mq-clock.h | 16 | ||||
| -rw-r--r-- | include/linux/clk/imx.h | 15 |
5 files changed, 49 insertions, 3 deletions
diff --git a/include/dt-bindings/clock/imx8-clock.h b/include/dt-bindings/clock/imx8-clock.h index 673a8c662340..82b1fc8d1ee0 100644 --- a/include/dt-bindings/clock/imx8-clock.h +++ b/include/dt-bindings/clock/imx8-clock.h @@ -64,6 +64,8 @@ #define IMX_DC0_PLL1_CLK 81 #define IMX_DC0_DISP0_CLK 82 #define IMX_DC0_DISP1_CLK 83 +#define IMX_DC0_BYPASS0_CLK 84 +#define IMX_DC0_BYPASS1_CLK 85 /* MIPI-LVDS SS */ #define IMX_MIPI_IPG_CLK 90 diff --git a/include/dt-bindings/clock/imx8mm-clock.h b/include/dt-bindings/clock/imx8mm-clock.h index e63a5530aed7..47c6f7f9582c 100644 --- a/include/dt-bindings/clock/imx8mm-clock.h +++ b/include/dt-bindings/clock/imx8mm-clock.h @@ -274,6 +274,14 @@ #define IMX8MM_CLK_A53_CORE 251 -#define IMX8MM_CLK_END 252 +#define IMX8MM_CLK_CLKOUT1_SEL 252 +#define IMX8MM_CLK_CLKOUT1_DIV 253 +#define IMX8MM_CLK_CLKOUT1 254 +#define IMX8MM_CLK_CLKOUT2_SEL 255 +#define IMX8MM_CLK_CLKOUT2_DIV 256 +#define IMX8MM_CLK_CLKOUT2 257 + + +#define IMX8MM_CLK_END 258 #endif diff --git a/include/dt-bindings/clock/imx8mn-clock.h b/include/dt-bindings/clock/imx8mn-clock.h index 621ea0e87c67..d24b627cb2e7 100644 --- a/include/dt-bindings/clock/imx8mn-clock.h +++ b/include/dt-bindings/clock/imx8mn-clock.h @@ -234,6 +234,13 @@ #define IMX8MN_CLK_A53_CORE 214 -#define IMX8MN_CLK_END 215 +#define IMX8MN_CLK_CLKOUT1_SEL 215 +#define IMX8MN_CLK_CLKOUT1_DIV 216 +#define IMX8MN_CLK_CLKOUT1 217 +#define IMX8MN_CLK_CLKOUT2_SEL 218 +#define IMX8MN_CLK_CLKOUT2_DIV 219 +#define IMX8MN_CLK_CLKOUT2 220 + +#define IMX8MN_CLK_END 221 #endif diff --git a/include/dt-bindings/clock/imx8mq-clock.h b/include/dt-bindings/clock/imx8mq-clock.h index 9b8045d75b8b..82e907ce7bdd 100644 --- a/include/dt-bindings/clock/imx8mq-clock.h +++ b/include/dt-bindings/clock/imx8mq-clock.h @@ -431,6 +431,20 @@ #define IMX8MQ_CLK_A53_CORE 289 -#define IMX8MQ_CLK_END 290 +#define IMX8MQ_CLK_MON_AUDIO_PLL1_DIV 290 +#define IMX8MQ_CLK_MON_AUDIO_PLL2_DIV 291 +#define IMX8MQ_CLK_MON_VIDEO_PLL1_DIV 292 +#define IMX8MQ_CLK_MON_GPU_PLL_DIV 293 +#define IMX8MQ_CLK_MON_VPU_PLL_DIV 294 +#define IMX8MQ_CLK_MON_ARM_PLL_DIV 295 +#define IMX8MQ_CLK_MON_SYS_PLL1_DIV 296 +#define IMX8MQ_CLK_MON_SYS_PLL2_DIV 297 +#define IMX8MQ_CLK_MON_SYS_PLL3_DIV 298 +#define IMX8MQ_CLK_MON_DRAM_PLL_DIV 299 +#define IMX8MQ_CLK_MON_VIDEO_PLL2_DIV 300 +#define IMX8MQ_CLK_MON_SEL 301 +#define IMX8MQ_CLK_MON_CLK2_OUT 302 + +#define IMX8MQ_CLK_END 303 #endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */ diff --git a/include/linux/clk/imx.h b/include/linux/clk/imx.h new file mode 100644 index 000000000000..75a0d9696552 --- /dev/null +++ b/include/linux/clk/imx.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2020 Freescale Semiconductor, Inc. + * + * Author: Lee Jones <lee.jones@linaro.org> + */ + +#ifndef __LINUX_CLK_IMX_H +#define __LINUX_CLK_IMX_H + +#include <linux/types.h> + +void imx6sl_set_wait_clk(bool enter); + +#endif |
