diff options
| author | David S. Miller <davem@davemloft.net> | 2021-03-25 17:37:30 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2021-03-25 17:37:30 -0700 |
| commit | d54e1348d8ef19d5b2cd555e22ffc356f755d66e (patch) | |
| tree | 1c268024e10fcf3e50158107d46348d624c3ed23 /include | |
| parent | 6c996e19949b34d7edebed4f6b0511145c036404 (diff) | |
| parent | 6ccf12ae111e49324b439410066e8cc359aeee6d (diff) | |
Merge branch 'stmmac-multivector-msi'
Voon Weifeng says:
====================
net: stmmac: enable multi-vector MSI
This patchset adds support for multi MSI interrupts in addition to
current single common interrupt implementation. Each MSI interrupt is tied
to a newly introduce interrupt service routine(ISR). Hence, each interrupt
will only go through the corresponding ISR.
In order to increase the efficiency, enabling multi MSI interrupt will
automatically select the interrupt mode configuration INTM=1. When INTM=1,
the TX/RX transfer complete signal will only asserted on corresponding
sbd_perch_tx_intr_o[] or sbd_perch_rx_intr_o[] without asserting signal
on the common sbd_intr_o. Hence, for each TX/RX interrupts, only the
corresponding ISR will be triggered.
Every vendor might have different MSI vector assignment. So, this patchset
only includes multi-vector MSI assignment for Intel platform.
Changes:
v1 -> v2
patch 2/5
-Remove defensive check for invalid dev pointer
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/stmmac.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index febdb43d27e5..e338ef7abc00 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -96,6 +96,7 @@ struct stmmac_dma_cfg { int mixed_burst; bool aal; bool eame; + bool multi_msi_en; }; #define AXI_BLEN 7 @@ -237,5 +238,13 @@ struct plat_stmmacenet_data { struct pci_dev *pdev; bool has_crossts; int int_snapshot_num; + bool multi_msi_en; + int msi_mac_vec; + int msi_wol_vec; + int msi_lpi_vec; + int msi_sfty_ce_vec; + int msi_sfty_ue_vec; + int msi_rx_base_vec; + int msi_tx_base_vec; }; #endif |