diff options
| author | Bjorn Helgaas <bhelgaas@google.com> | 2018-10-20 11:45:28 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2018-10-20 11:45:28 -0500 |
| commit | de468b755464426c276df2daf1e54bcd64186020 (patch) | |
| tree | 85d70498798e2112fad41d5b0e5e29a520d6bed6 /include | |
| parent | b1801bf05964321d79fbbeae96c8ab09da2e2e49 (diff) | |
| parent | d6112f8def514e019658bcc9b57d53acdb71ca3f (diff) | |
Merge branch 'pci/enumeration'
- Remove x86 and arm64 node-local allocation for host bridge structures
(Punit Agrawal)
- Pay attention to device-specific _PXM node values (Jonathan Cameron)
- Support new Immediate Readiness bit (Felipe Balbi)
* pci/enumeration:
PCI: Add support for Immediate Readiness
ACPI/PCI: Pay attention to device-specific _PXM node values
x86/PCI: Remove node-local allocation when initialising host controller
arm64: PCI: Remove node-local allocations when initialising host controller
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/pci.h | 1 | ||||
| -rw-r--r-- | include/uapi/linux/pci_regs.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h index 6925828f9f25..60da5d7d4310 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -325,6 +325,7 @@ struct pci_dev { pci_power_t current_state; /* Current operating state. In ACPI, this is D0-D3, D0 being fully functional, and D3 being off. */ + unsigned int imm_ready:1; /* Supports Immediate Readiness */ u8 pm_cap; /* PM capability offset */ unsigned int pme_support:5; /* Bitmask of states from which PME# can be generated */ diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index ee556ccc93f4..e1e9888c85e6 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -52,6 +52,7 @@ #define PCI_COMMAND_INTX_DISABLE 0x400 /* INTx Emulation Disable */ #define PCI_STATUS 0x06 /* 16 bits */ +#define PCI_STATUS_IMM_READY 0x01 /* Immediate Readiness */ #define PCI_STATUS_INTERRUPT 0x08 /* Interrupt status */ #define PCI_STATUS_CAP_LIST 0x10 /* Support Capability List */ #define PCI_STATUS_66MHZ 0x20 /* Support 66 MHz PCI 2.1 bus */ |