Merge tag 'qcom-drivers-for-7.4-3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

More Qualcomm driver updates for v7.4

Add SM8950 Maili and SM8975 Hawi SoC IDs. Document the Maili CPUCP
mailbox and PMIC arbiter compatibles.

Allow QSEECOM on the Kalambo CRD, Glymur QCB, and Lenovo ThinkPad T14s
Gen 7. Reuse Glymur's UBWC configuration for Kalambo, and add the Nord
LLCC configuration and binding.

Add Shikra SoC and subsystem low-power statistics. Document its
modem_apps GLINK audio channel. Document MSM8952 SCM and record that
MSM8952 has no UBWC. Describe IPQ5424 IMEM as mmio-sram and add the
MSM8960 SPS interrupt-controller syscon compatible.

Fix SCM PAS resource-table retries and handling of empty tables. Use
sleepable one-time initialization for TZMEM, and correct SCM Kconfig
selection for non-Qualcomm builds. Disable the SHM bridge on SM7125
to avoid boot-time RCU stalls.

Fix PMIC GLINK probe ordering and PD charger ULOG removal races. Provide
I2C Hub serial-engine program-RAM depth without accessing absent DMA
registers.

* tag 'qcom-drivers-for-7.4-3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (31 commits)
  soc: qcom: geni-se: Drop unused icc_ddr parameter from geni_icc_get()
  firmware: qcom: scm: Allow QSEECOM on ThinkPad T14s Gen 7
  dt-bindings: mailbox: qcom: Document Maili CPUCP mailbox controller
  dt-bindings: spmi: glymur-spmi-pmic-arb: Add compatible for Qualcomm Maili SoC
  soc: qcom: pmic_pdcharger_ulog: prevent work requeue during remove
  ASoC: dt-bindings: qcom,apr: Add modem_apps GLINK channel for shikra
  firmware: qcom: tzmem: disable SHM bridge for SM7125 platform
  soc: qcom: ubwc: Add Kalambo UBWC config
  firmware: qcom: scm: Allow QSEECOM on Kalambo CRD
  firmware: qcom: scm: Allow QSEECOM on the Glymur QCB
  soc: qcom: stats: Add stats compatible and config for Shikra
  dt-bindings: soc: qcom: stats: Add compatible for Shikra
  soc: qcom: fix typo "upto" in comment
  firmware: qcom: fix typo "uninterruptable" in comment
  soc: qcom: socinfo: Add SM8950 SoC ID
  dt-bindings: arm: qcom,ids: Add SoC ID for SM8950
  soc: qcom: geni-se: provide PROG_RAM_DEPTH for I2C HUB Serial Engines
  dt-bindings: mfd: syscon: add qcom,msm8960-sps-sic
  firmware: qcom: scm: Hide QCOM_SCM instead of depending on ARCH_QCOM
  soc: qcom: llcc: Add LLCC configuration for Nord
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

3 files changed, 5 insertions, 1 deletions

diff --git a/include/dt-bindings/arm/qcom,ids.h b/include/dt-bindings/arm/qcom,ids.h
index b63e4a0b8e54..135297027580 100644
--- a/include/dt-bindings/arm/qcom,ids.h
+++ b/include/dt-bindings/arm/qcom,ids.h
@@ -301,8 +301,10 @@
 #define QCOM_ID_QCS9075			676
 #define QCOM_ID_QCS615			680
 #define QCOM_ID_SA8797P			690
+#define QCOM_ID_SM8975			707
 #define QCOM_ID_CQ7790M			731
 #define QCOM_ID_CQ7790S			732
+#define QCOM_ID_SM8950			735
 #define QCOM_ID_CQ2390M			756
 #define QCOM_ID_CQ2390S			758
 #define QCOM_ID_IQ2390S			759
diff --git a/include/linux/soc/qcom/geni-se.h b/include/linux/soc/qcom/geni-se.h
index 29a53bbc0dd4..95c0cc4d4ea1 100644
--- a/include/linux/soc/qcom/geni-se.h
+++ b/include/linux/soc/qcom/geni-se.h
@@ -573,7 +573,7 @@ void geni_se_tx_dma_unprep(struct geni_se *se, dma_addr_t iova, size_t len);
 
 void geni_se_rx_dma_unprep(struct geni_se *se, dma_addr_t iova, size_t len);
 
-int geni_icc_get(struct geni_se *se, const char *icc_ddr);
+int geni_icc_get(struct geni_se *se);
 
 int geni_icc_set_bw(struct geni_se *se);
 int geni_icc_set_bw_ab(struct geni_se *se, u32 core_ab, u32 cfg_ab, u32 ddr_ab);
diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h
index 1ccc429401e8..713cb0221b14 100644
--- a/include/linux/soc/qcom/llcc-qcom.h
+++ b/include/linux/soc/qcom/llcc-qcom.h
@@ -74,6 +74,7 @@
 #define LLCC_CAMSRTIP	 73
 #define LLCC_CAMRTRF	 74
 #define LLCC_CAMSRTRF	 75
+#define LLCC_GPU_LITTLE  80
 #define LLCC_OOBM_NS	 81
 #define LLCC_OOBM_S	 82
 #define LLCC_VIDEO_APV	 83
@@ -85,6 +86,7 @@
 #define LLCC_CAM_OFE_STROV	 93
 #define LLCC_CPUSS_HEU	 94
 #define LLCC_PCIE_TCU	 97
+#define LLCC_GPUHTW_LITTLE	 98
 #define LLCC_MDM_PNG_FIXED	 100
 #define LLCC_PPE_RXDESC		 101
 #define LLCC_PPE_RXFILL		 102