Merge tag 'pmdomain-v7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm

Pull pmdomain updates from Ulf Hansson:
 - amlogic: Add support for A9 power domains
 - bcm: Raise ASB poll timeout to 100us for bcm2835-power
 - imx: Allow building power domain drivers as a modules
 - mediatek:
    - Add support for the MT6858 power domains
    - Add support for the MT8196 HFRP DirectCTL power domains
 - qcom:
    - Add support for RPMh power domains for Maili
    - Skip retention by default for rpmhpd
 - renesas: Add support for R-Car X5H Module Controller
 - rockchip: Add a regulator to the RK3568 NPU power domain
 - tegra: Add support for multi-socket platforms

* tag 'pmdomain-v7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm: (24 commits)
  pmdomain: renesas: Add R-Car X5H MDLC driver
  dt-bindings: power: Document Renesas R-Car X5H Module Controller
  pmdomain: amlogic: Add support for A9 power domains controller
  dt-bindings: power: Add Amlogic A9 power domains
  clk: imx: imx8qxp: add soft dependency on SCU power domain driver
  pmdomain: imx: scu-pd: allow building as a module
  of: export of_stdout symbol
  pmdomain: imx8m{p,}-blk-ctrl: Add MODULE_DESCRIPTION
  pmdomain: mediatek: Add support for MT6858 SoC
  pmdomain: mediatek: Add support for secure modem power domain control
  dt-bindings: power: Add MediaTek MT6858 power domain controller
  pmdomain: rockchip: Add a regulator to the RK3568 NPU power domain
  pmdomain: imx: Make IMX8M/IMX9 BLK_CTRL tristate
  dt-bindings: power: qcom,rpmpd: document RPMh power domain for Maili
  pmdomain: tegra: Add support for multi-socket platforms
  pmdomain: bcm: bcm2835-power: Raise ASB poll timeout to 100us
  pmdomain: mediatek: Add support for MT8196 HFRP DirectCTL domains
  pmdomain: mediatek: Add support for Direct CTL simple power sequence
  pmdomain: mediatek: Respect PD relationships during error cleanup
  dt-bindings: power: mediatek: Add support for MT8196 direct HFRP
  ...

5 files changed, 106 insertions, 0 deletions

diff --git a/include/dt-bindings/power/amlogic,a9-pwrc.h b/include/dt-bindings/power/amlogic,a9-pwrc.h
new file mode 100644
index 000000000000..c1c2308a0d0c
--- /dev/null
+++ b/include/dt-bindings/power/amlogic,a9-pwrc.h
@@ -0,0 +1,61 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
+/*
+ * Copyright (C) 2026 Amlogic, Inc. All rights reserved
+ */
+
+#ifndef _DT_BINDINGS_AMLOGIC_A9_POWER_H
+#define _DT_BINDINGS_AMLOGIC_A9_POWER_H
+
+#define PWRC_A9_DSPA_ID			0
+#define PWRC_A9_U3HSG_U3_ID		1
+#define PWRC_A9_DP_ID			2
+#define PWRC_A9_DOS_HCODEC_ID		3
+#define PWRC_A9_TAHOE_ID		4
+#define PWRC_A9_DOS_HEVC_ID		5
+#define PWRC_A9_U2H_ID			6
+#define PWRC_A9_U3DRD_B_ID		7
+#define PWRC_A9_VPU_HDMI_ID		8
+#define PWRC_A9_U2DRD_ID		9
+#define PWRC_A9_U3DRD_A_ID		10
+#define PWRC_A9_SD_EMMC_C_ID		11
+#define PWRC_A9_GE2D_ID			12
+#define PWRC_A9_AMFC_ID			13
+#define PWRC_A9_EDPTX_ID		14
+#define PWRC_A9_OPP_ID			15
+#define PWRC_A9_VICP_ID			16
+#define PWRC_A9_SD_EMMC_A_ID		17
+#define PWRC_A9_SD_EMMC_B_ID		18
+#define PWRC_A9_ETH_ID			19
+#define PWRC_A9_PCIE_A_ID		20
+#define PWRC_A9_PCIE_B_ID		21
+#define PWRC_A9_NNA_4T_ID		22
+#define PWRC_A9_HDMIRX_ID		23
+#define PWRC_A9_CVE_ID			24
+#define PWRC_A9_ISP_ID			25
+#define PWRC_A9_ETH_1G_ID		26
+#define PWRC_A9_U3HSG_HSG_ID		27
+#define PWRC_A9_U3DPPHY_U3_ID		28
+#define PWRC_A9_U3DPPHY_DP_ID		29
+#define PWRC_A9_PCIE3PHY_ID		30
+#define PWRC_A9_U3HSG_PCIE2_ID		31
+#define PWRC_A9_MALI_TOP_ID		32
+#define PWRC_A9_AO_SED_ID		33
+#define PWRC_A9_AO_IR_ID		34
+#define PWRC_A9_AO_UART_B_ID		35
+#define PWRC_A9_AO_UART_C_ID		36
+#define PWRC_A9_AO_UART_D_ID		37
+#define PWRC_A9_AO_SPISG_ID		38
+#define PWRC_A9_AO_UART_E_ID		39
+#define PWRC_A9_AO_CEC_ID		40
+#define PWRC_A9_EE_SRAMA_ID		41
+#define PWRC_A9_AUDIO_ID		42
+#define PWRC_A9_DMC0_ID			43
+#define PWRC_A9_GIC_ID			44
+#define PWRC_A9_DDRPHY_ID		45
+#define PWRC_A9_AUCPU_ID		46
+#define PWRC_A9_DSI0_ID			47
+#define PWRC_A9_DSI1_ID			48
+#define PWRC_A9_CAN0_ID			49
+#define PWRC_A9_CAN1_ID			50
+
+#endif
diff --git a/include/dt-bindings/power/mediatek,mt6858-power.h b/include/dt-bindings/power/mediatek,mt6858-power.h
new file mode 100644
index 000000000000..6ed9e82d4ad3
--- /dev/null
+++ b/include/dt-bindings/power/mediatek,mt6858-power.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+
+#ifndef _DT_BINDINGS_POWER_MT6858_POWER_H
+#define _DT_BINDINGS_POWER_MT6858_POWER_H
+
+#define MT6858_POWER_DOMAIN_MD				0
+#define MT6858_POWER_DOMAIN_CONN			1
+#define MT6858_POWER_DOMAIN_AUDIO			2
+#define MT6858_POWER_DOMAIN_MM_INFRA			3
+#define MT6858_POWER_DOMAIN_ISP_IMG1			4
+#define MT6858_POWER_DOMAIN_ISP_IMG2			5
+#define MT6858_POWER_DOMAIN_ISP_IPE			6
+#define MT6858_POWER_DOMAIN_VDE0			7
+#define MT6858_POWER_DOMAIN_VEN0			8
+#define MT6858_POWER_DOMAIN_CAM_MAIN			9
+#define MT6858_POWER_DOMAIN_CAM_SUBA			10
+#define MT6858_POWER_DOMAIN_CAM_SUBB			11
+#define MT6858_POWER_DOMAIN_DIS0			12
+#define MT6858_POWER_DOMAIN_MM_PROC_DORMANT		13
+#define MT6858_POWER_DOMAIN_CSI_RX			14
+#define MT6858_POWER_DOMAIN_SSUSB			15
+
+#endif /* _DT_BINDINGS_POWER_MT6858_POWER_H */
diff --git a/include/dt-bindings/power/mediatek,mt8196-power.h b/include/dt-bindings/power/mediatek,mt8196-power.h
index 0f622a93c807..085790bf8124 100644
--- a/include/dt-bindings/power/mediatek,mt8196-power.h
+++ b/include/dt-bindings/power/mediatek,mt8196-power.h
@@ -30,6 +30,10 @@
 #define MT8196_POWER_DOMAIN_MM_PROC_DORMANT		0
 #define MT8196_POWER_DOMAIN_SSR				1
 
+/* HFRPSYS Multimedia Power Control (MMPC) - Direct Control */
+#define MT8196_POWER_DOMAIN_EDPTX			0
+#define MT8196_POWER_DOMAIN_DPTX			1
+
 /* HFRPSYS MultiMedia Power Control (MMPC) - HW Voter */
 #define MT8196_POWER_DOMAIN_VDE0			0
 #define MT8196_POWER_DOMAIN_VDE1			1
diff --git a/include/dt-bindings/power/renesas,r8a78000-mdlc.h b/include/dt-bindings/power/renesas,r8a78000-mdlc.h
new file mode 100644
index 000000000000..6f3d1ae23648
--- /dev/null
+++ b/include/dt-bindings/power/renesas,r8a78000-mdlc.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (C) 2026 Glider bv
+ */
+#ifndef __DT_BINDINGS_POWER_RENESAS_R8A78000_MDLC_H__
+#define __DT_BINDINGS_POWER_RENESAS_R8A78000_MDLC_H__
+
+/* R-Car X5H Module Controller Always-On Power Domains */
+
+#define R8A78000_MDLC_PD_AON			0x40
+#define R8A78000_MDLC_PD_SCP			0x41
+#define R8A78000_MDLC_PD_APL			0x42
+#define R8A78000_MDLC_PD_ACL			0x43
+
+#endif /* __DT_BINDINGS_POWER_RENESAS_R8A78000_MDLC_H__ */
diff --git a/include/linux/soc/mediatek/mtk_sip_svc.h b/include/linux/soc/mediatek/mtk_sip_svc.h
index abe24a73ee19..6c95a29b79fa 100644
--- a/include/linux/soc/mediatek/mtk_sip_svc.h
+++ b/include/linux/soc/mediatek/mtk_sip_svc.h
@@ -22,6 +22,9 @@
 	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, MTK_SIP_SMC_CONVENTION, \
 			   ARM_SMCCC_OWNER_SIP, fn_id)
 
+/* Modem related SMC call */
+#define MTK_SIP_KERNEL_CCCI_CONTROL	MTK_SIP_SMC_CMD(0x505)
+
 /* DVFSRC SMC calls */
 #define MTK_SIP_DVFSRC_VCOREFS_CONTROL	MTK_SIP_SMC_CMD(0x506)