Merge tag 'drm-intel-next-2026-09-03' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next

Xe related:
 - Some clean-ups around drm/xe/display (Jani)

Display in general:
 - Regular clean-ups (Jani)
 - Enable CMRR (Content Match Refresh Rate) in fixed-RR VRR path (Mitul)
 - Switch DG2 Multi-protocol PLL (MPLLB) to the DPLL framework (Mika)
 - DP-HDMI PCON DSC fixes (Ankit)
 - Remove duplicated call introduced by a bad cherry-pick (Chaitanya)
 - Limit invalid joiner combinations harder (Jani)
 - Fix value being written to DDI_CLK_VALFREQ (Suraj)
 - Harden some bit-shifting operations (Luca)
 - Clear SEL_FETCH_PLANE_CTL on plane disable (Nemesa)
 - Update CURSOR_BUF/WM masks (Suraj)
 - CDCLK related fixes and refactor specially around PCODE interaction (Ville)
 - Reduce clock_gating interface between core and display (Luca)
 - Gate UHBR SST SDP splitting on sink capability (Mitul)
 - Enable joiner cursor fast updates (Nemesa)
 - Cear the Panel Replay error status register (Jake)
 - Add HDMI TMDS audio bandwidth check (Chaitanya)
 - Reset use_flipq when duplicating crtc state (Mika)

Beyond display:
 - Guard against NULL driver_data (Deepanshu)
 - Rename GEN6_PCODE_DATA to match spec (Michal)

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patch.msgid.link/apmWNIUJ5lmsvNzc@intel.com

1 files changed, 14 insertions, 1 deletions

diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
index de395df9ca30..5e44c022d1ae 100644
--- a/include/drm/intel/display_parent_interface.h
+++ b/include/drm/intel/display_parent_interface.h
@@ -179,7 +179,7 @@ struct intel_display_pc8_interface {
 };
 
 struct intel_display_pcode_interface {
-	int (*read)(struct drm_device *drm, u32 mbox, u32 *val, u32 *val1);
+	int (*read)(struct drm_device *drm, u32 mbox, u32 *val0, u32 *val1);
 	int (*write)(struct drm_device *drm, u32 mbox, u32 val, int timeout_ms);
 	int (*request)(struct drm_device *drm, u32 mbox, u32 request,
 		       u32 reply_mask, u32 reply, int timeout_base_ms);
@@ -230,6 +230,10 @@ struct intel_display_vlv_iosf_interface {
 	int (*write)(struct drm_device *drm, enum vlv_iosf_sb_unit unit, u32 addr, u32 val);
 };
 
+struct intel_display_wa_interface {
+	bool (*wa_16023588340)(struct drm_device *drm);
+};
+
 /**
  * struct intel_display_parent_interface - services parent driver provides to display
  *
@@ -291,6 +295,12 @@ struct intel_display_parent_interface {
 	/** @vlv_iosf: VLV IOSF sideband. Optional. */
 	const struct intel_display_vlv_iosf_interface *vlv_iosf;
 
+	/**
+	 * @wa: Display workarounds query. Use only for workarounds that require
+	 * information only available to the parent driver. Optional.
+	 */
+	const struct intel_display_wa_interface *wa;
+
 	/* Generic independent functions */
 	struct {
 		/** @fence_priority_display: Set display priority. Optional. */
@@ -302,6 +312,9 @@ struct intel_display_parent_interface {
 		/** @has_fenced_regions: Support legacy fencing? Optional. */
 		bool (*has_fenced_regions)(struct drm_device *drm);
 
+		/** @transient_data_flush: Transient data flush. Optional. */
+		void (*transient_data_flush)(struct drm_device *drm);
+
 		/** @vgpu_active: Is vGPU active? Optional. */
 		bool (*vgpu_active)(struct drm_device *drm);
 	};