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authorLinus Torvalds <torvalds@linux-foundation.org>2026-10-21 11:16:50 -1000
committerLinus Torvalds <torvalds@linux-foundation.org>2026-10-21 11:16:50 -1000
commit2e973d4882230079bfbdc9f33077006bb50de700 (patch)
tree1736ac4b36b9ab08af9f6df2de1a722359d2852b /kernel
parent1fbe92c39e72f6baf1ebda5a21c54442865d9622 (diff)
parent9376df3496753563e3d7f7cb5d91525f9a6e9497 (diff)
Merge tag 'irq-drivers-2026-10-20' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq chip driver updates from Thomas Gleixner: "Updates for interrupt chip drivers: - Remove the futile attempts to cleanup resources when the probing of the main interrupt chip fails for SiFIVE/PLIC devices. If that probe fails the system will stall immediately afterwards in the boot process without reaching a state where the error could be diagnosed. The lack of resource cleanup led to a frenzy of AI detected/assisted "fixes" which just make the code pretend to be correct for no value. Remove the existing half baked cleanup and immediately panic the machine when the probe fails. That's far more useful than letting it proceed and stall out a millisecond later with no information about the root cause. - A series of fixes for the ARM GIC-V3 driver addressing a potential double free, a bitmask overrun on 32-bit ARM and a OF node leak. - Automatically set the IRQ_DOMAIN_FLAG_DESTROY_GC when a interrupt domain is created that also allocates the generic interrupt chip during domain creation. That removes the requirement for manually setting the flag in the domain creation info structure when it contains a valid entry for allocating the generic interrupt chip. Remove the therefore redundant setters of IRQ_DOMAIN_FLAG_DESTROY_GC in the existing drivers. - Add support for Annapurna Labs FIC version 2 and 3 and implement affinity control for the demultiplexed interrupts by utilizing the recently merged interrupt redirection infrastructure. - Convert the ACPI device ID structures to named initializers - Consolidate the IPI related constants for RISC-V interrupt controllers - Add support for Qualcomm Purwa SoC interrupt chip and consolidate the workaround for the previous version in Hamoa SoCs. - The usual small fixes and improvements all over the place" * tag 'irq-drivers-2026-10-20' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (61 commits) irqchip/al-fic: Support per-child affinity via interrupt redirection irqchip/al-fic: Add support for FIC v3 irqchip/al-fic: Support error and fatal outputs and FIC v2 dt-bindings: interrupt-controller: amazon,al-fic: Add mask selection irqchip/al-fic: Switch to shared parent interrupt irqchip/al-fic: Keep the device_node instead of a cached name string irqchip/al-fic: Use %pOF and raise init log level irqchip/al-fic: Use %pe to print init error irqchip/al-fic: Fix coding style issues irqchip: Use named initializers for acpi_device_id irqchip/gic-v5: Fix standalone IRSes OF probe dt-bindings: interrupt-controller: gicv5: Relax IRS properties constraints irqchip/renesas-rzv2h: Preserve TIEN state in rzv2h_tint_set_type() irqchip/loongson-eiointc: Use pa_to_nid() rather than hard-code irqchip/riscv-imsic: Expose the fwnode via the global config irqchip/meson-gpio: Allow the GPIO interrupts to wake the system irqchip/gic-v3: Ensure change to DS is visible irqchip/mips-gic: Transfer interrupt mask state across clusters irqchip/mips-gic: Fix recursive acquisition of gic_lock in gic_set_affinity() irqchip/mips-gic: Fix unbalanced cm_core_lock in for_each_online_cpu_gic() ...
Diffstat (limited to 'kernel')
-rw-r--r--kernel/irq/irqdomain.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c
index 57c819da30c2..4fdcb6df5306 100644
--- a/kernel/irq/irqdomain.c
+++ b/kernel/irq/irqdomain.c
@@ -344,6 +344,7 @@ static struct irq_domain *__irq_domain_instantiate(const struct irq_domain_info
err = irq_domain_alloc_generic_chips(domain, info->dgc_info);
if (err)
goto err_domain_free;
+ domain->flags |= IRQ_DOMAIN_FLAG_DESTROY_GC;
}
if (info->init) {