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authorLinus Torvalds <torvalds@linux-foundation.org>2026-10-20 10:38:57 -1000
committerLinus Torvalds <torvalds@linux-foundation.org>2026-10-20 10:38:57 -1000
commit42e6e6a6ffdf0d8ffeafc6fb868bd8522f31b4a9 (patch)
treebe967bc5de046d2f9a4866b00012cb865fd0e332 /lib
parent1bd2400fba444db006c1949f6ea02cbc5543cee7 (diff)
parent2711d67bc3a776abcfc651ad87be5d29ada19166 (diff)
Merge tag 'x86_cpu_for_v7.4_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 cpu feature updates from Borislav Petkov: - Rework early CPU features detection code to handle a case where recorded CPU capabilities are temporarily cleared in an interruptible region. The practical implication of this lead to, for example, KASAN complaining due to 5-level pagetable support disappearing intermittently (Ihor Solodrai) - AMD Zen5 started reporting TLB sizes as multiples of 32 so adjust the TLB sizes reporting code to consider that - Return the proper retval when trying to enable user shadow stacks * tag 'x86_cpu_for_v7.4_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/cpu: Don't transiently clear the boot CPU's capabilities x86/cpu: Move 32-bit SEP setup into identify_cpu() x86/cpu: Inline generic_identify() into identify_cpu() x86/cpu: Initialize boot CPU cpuinfo defaults early x86/cpu: Factor init_cpu_info() out of identify_cpu() x86/CPU/AMD: Fix Zen5 TLB sizes reporting x86/shstk: Return the correct error value when user shadow stacks are disabled
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