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| author | Hans Zhang <18255117159@163.com> | 2026-09-12 00:25:36 +0800 |
|---|---|---|
| committer | Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> | 2026-09-28 05:06:16 +0200 |
| commit | f29719b5064c07cec23c928055df302181374df5 (patch) | |
| tree | 05734f1467af8b8f2159a6d1f1093820340bfba8 /rust/kernel/alloc/kvec/errors.rs | |
| parent | cee9395acd8043be0644b25c34bfa86623f2b935 (diff) | |
PCI: dwc: Align register macros with Synopsys documentation
The DWC PCIe register and field macros are inconsistently named and
often do not match the Synopsys DesignWare PCIe Controller Reference
Manual. This makes it harder to cross-reference the code with the
documentation when debugging or maintaining the driver.
As suggested during review, do not add an "_OFF" suffix to the Port Link
Control register: the suffix is ambiguous (offset vs. off) and
unnecessary. Use PORT_LINK_CTRL, and include the register name in its
field macros, e.g. PORT_LINK_CTRL_DLE, PORT_LINK_CTRL_FLM, and
PORT_LINK_CTRL_LC_*.
Align other DWC PCIe controller-internal register macros in the same
spirit by dropping the redundant PCIE_ prefix and using the documented
base names, such as PORT_FORCE_LINK, PORT_AFAC, PORT_LANE_SKEW,
TIMER_CTRL_MAX_FUNC_NUM, PORT_LINK_DEBUG0/1, LINK_WIDTH_SPEED_CTRL,
GEN3_CTRL, GEN3_EQ_CTRL, MULTI_LANE_CTRL, MISC_CONTROL_1,
MSIX_DOORBELL, and the ATU_* registers. Field macros are renamed
consistently so their register association is clear.
This improves code maintainability and eases future reference to the
controller manual.
No functional change intended.
Co-developed-by: Feizhou Yu <yufeizhou201@163.com>
Signed-off-by: Feizhou Yu <yufeizhou201@163.com>
Signed-off-by: Hans Zhang <18255117159@163.com>
[mani: fixed checkpatch warnings by moving comments]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https://patch.msgid.link/20260911162537.469018-2-18255117159@163.com
Diffstat (limited to 'rust/kernel/alloc/kvec/errors.rs')
0 files changed, 0 insertions, 0 deletions
