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authorMiquel Raynal <miquel.raynal@bootlin.com>2025-07-31 18:52:16 +0200
committerMiquel Raynal <miquel.raynal@bootlin.com>2025-07-31 18:52:16 +0200
commit9cf9db888f387844e063efc6296e9fa5c042995e (patch)
tree6c0cea7ecc9f06c93194ec80551e98e07871e3d7 /rust/kernel/sync.rs
parent3dd8aa0ef78e4941f4b915d317616c03d08e31b2 (diff)
parentfb2fae70e7e985c4acb1ad96110d8b98bb64a87c (diff)
Merge tag 'nand/for-6.17' into mtd/next
* Raw NAND changes: Various controller drivers received minor fixes like DMA mapping checks, better timing derivations or bitflip statistics. It has also been discovered that some Hynix NAND flashes were not supporting read-retries, which is not properly supported. * SPI NAND changes: In order to support high-speed modes, certain chips need extra configuration like adding more dummy cycles. This is now possible, especially on Winbond chips. Aside from that, Gigadevice gets support for a new chip (GD5F1GM9). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Diffstat (limited to 'rust/kernel/sync.rs')
-rw-r--r--rust/kernel/sync.rs2
1 files changed, 2 insertions, 0 deletions
diff --git a/rust/kernel/sync.rs b/rust/kernel/sync.rs
index 36a719015583..c23a12639924 100644
--- a/rust/kernel/sync.rs
+++ b/rust/kernel/sync.rs
@@ -10,6 +10,7 @@ use crate::types::Opaque;
use pin_init;
mod arc;
+pub mod completion;
mod condvar;
pub mod lock;
mod locked_by;
@@ -17,6 +18,7 @@ pub mod poll;
pub mod rcu;
pub use arc::{Arc, ArcBorrow, UniqueArc};
+pub use completion::Completion;
pub use condvar::{new_condvar, CondVar, CondVarTimeoutResult};
pub use lock::global::{global_lock, GlobalGuard, GlobalLock, GlobalLockBackend, GlobalLockedBy};
pub use lock::mutex::{new_mutex, Mutex, MutexGuard};