diff options
| author | Jouni Högander <jouni.hogander@intel.com> | 2026-03-04 13:30:11 +0200 |
|---|---|---|
| committer | Tvrtko Ursulin <tursulin@ursulin.net> | 2026-03-10 08:26:33 +0000 |
| commit | 5923a6e0459fdd3edac4ad5abccb24d777d8f1b6 (patch) | |
| tree | 46e348e1321e11b792e3a83a664fd206a28f3509 /scripts/include | |
| parent | bb5f1cd10101c2567bff4d0e760b74aee7c42f44 (diff) | |
drm/i915/psr: Write DSC parameters on Selective Update in ET mode
There are slice row per frame and pic height parameters in DSC that needs
to be configured on every Selective Update in Early Transport mode. Use
helper provided by DSC code to configure these on Selective Update when in
Early Transport mode. Also fill crtc_state->psr2_su_area with full frame
area on full frame update for DSC calculation.
v2: move psr2_su_area under skip_sel_fetch_set_loop label
Bspec: 68927, 71709
Fixes: 467e4e061c44 ("drm/i915/psr: Enable psr2 early transport as possible")
Cc: <stable@vger.kernel.org> # v6.9+
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patch.msgid.link/20260304113011.626542-5-jouni.hogander@intel.com
(cherry picked from commit 3140af2fab505a4cd47d516284529bf1585628be)
Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net>
Diffstat (limited to 'scripts/include')
0 files changed, 0 insertions, 0 deletions