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authorKarl Mehltretter <kmehltretter@gmail.com>2026-09-21 21:45:20 +0100
committerRussell King <rmk+kernel@armlinux.org.uk>2026-10-14 17:19:56 +0100
commit2315f2c46e0813d010e7b3ea40f2769621453e27 (patch)
treebb2dab455e0a9fb9f4786ccbc9758f1d6a5af5aa /scripts
parent4fd69e8a9ebc42e292637ec2ebfb6bcf2d2f6c0e (diff)
ARM: 9522/1: cacheinfo: guard the CLIDR read in populate_cache_leaves()
ARM1176 and ARM11 MPCore can be reported as ARMv7 by cpu_architecture() even though they lack CLIDR. populate_cache_leaves() therefore needs the CTR-format check used by detect_cache_level(). DT-based early allocation bypasses init_cache_level(), so its check no longer protects populate_cache_leaves(). A combined ARMv6/ARMv7 SMP kernel can reach this path on BCM2835, whose DT describes its caches. Share the CLIDR capability check between detection and population. Return -ENOENT from population when CLIDR is unavailable, preserving the existing absence of cacheinfo and avoiding a new topology warning. Assisted-by: LLM Cc: stable@vger.kernel.org Tested-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Link: https://lore.kernel.org/r/20260912195552.76673-4-kmehltretter@gmail.com/ Signed-off-by: Karl Mehltretter <kmehltretter@gmail.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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