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authorYeoreum Yun <yeoreum.yun@arm.com>2026-01-07 16:21:15 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2026-01-09 10:41:45 +0000
commitbdf3f4176092df5281877cacf42f843063b4784d (patch)
tree3296b5fa5765bdc867c4f0aa7ecd735002fc7e80 /scripts
parent5fcd5513072b09f6533e22a779183fa2818bce81 (diff)
arm64: Fix cleared E0POE bit after cpu_suspend()/resume()
TCR2_ELx.E0POE is set during smp_init(). However, this bit is not reprogrammed when the CPU enters suspension and later resumes via cpu_resume(), as __cpu_setup() does not re-enable E0POE and there is no save/restore logic for the TCR2_ELx system register. As a result, the E0POE feature no longer works after cpu_resume(). To address this, save and restore TCR2_EL1 in the cpu_suspend()/cpu_resume() path, rather than adding related logic to __cpu_setup(), taking into account possible future extensions of the TCR2_ELx feature. Fixes: bf83dae90fbc ("arm64: enable the Permission Overlay Extension for EL0") Cc: <stable@vger.kernel.org> # 6.12.x Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Reviewed-by: Kevin Brodsky <kevin.brodsky@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'scripts')
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