diff options
| author | Marc Zyngier <maz@kernel.org> | 2025-02-25 17:29:17 +0000 |
|---|---|---|
| committer | Oliver Upton <oliver.upton@linux.dev> | 2025-03-03 14:51:51 -0800 |
| commit | b7a252e881f3322abb9ec899d13dbf7bae7d9bea (patch) | |
| tree | c723f52be24af9fec9d7f9cedd944f521b9c1b59 /tools/arch/arm64/include/asm | |
| parent | 5815fb82dc67c936f2881e601f046faa6ff577be (diff) | |
arm64: sysreg: Add layout for ICH_MISR_EL2
The ICH_MISR_EL2-related macros are missing a number of status
bits that we are about to handle. Take this opportunity to fully
describe the layout of that register as part of the automatic
generation infrastructure.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20250225172930.1850838-4-maz@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Diffstat (limited to 'tools/arch/arm64/include/asm')
| -rw-r--r-- | tools/arch/arm64/include/asm/sysreg.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/tools/arch/arm64/include/asm/sysreg.h b/tools/arch/arm64/include/asm/sysreg.h index 5d9d7e394b25..b6c5ece4fdee 100644 --- a/tools/arch/arm64/include/asm/sysreg.h +++ b/tools/arch/arm64/include/asm/sysreg.h @@ -558,7 +558,6 @@ #define SYS_ICH_VSEIR_EL2 sys_reg(3, 4, 12, 9, 4) #define SYS_ICC_SRE_EL2 sys_reg(3, 4, 12, 9, 5) -#define SYS_ICH_MISR_EL2 sys_reg(3, 4, 12, 11, 2) #define SYS_ICH_EISR_EL2 sys_reg(3, 4, 12, 11, 3) #define SYS_ICH_ELRSR_EL2 sys_reg(3, 4, 12, 11, 5) #define SYS_ICH_VMCR_EL2 sys_reg(3, 4, 12, 11, 7) @@ -979,10 +978,6 @@ #define SYS_MPIDR_SAFE_VAL (BIT(31)) /* GIC Hypervisor interface registers */ -/* ICH_MISR_EL2 bit definitions */ -#define ICH_MISR_EOI (1 << 0) -#define ICH_MISR_U (1 << 1) - /* ICH_LR*_EL2 bit definitions */ #define ICH_LR_VIRTUAL_ID_MASK ((1ULL << 32) - 1) |