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authorDaniel Machon <daniel.machon@microchip.com>2026-09-28 21:33:00 +0200
committerJakub Kicinski <kuba@kernel.org>2026-10-02 13:08:55 -0700
commit1709aa382db7c1728c0430f1a3d7c6b32ed66402 (patch)
treed336f55236a80957ba56235769774024df960e1a /tools/lib/python/kdoc/python_version.py
parente013b82ed3b251e680401b4f4d541acd99cbe572 (diff)
net: lan966x: add PCIe FDMA MTU change support
Add MTU change support for the PCIe FDMA path: on an MTU change, the contiguous ATU-mapped RX and TX buffers are reallocated at the new size, falling back to the existing buffers on failure. Cap the PCIe DCB ring at 256 (FDMA_PCI_DCB_MAX): 512 DCBs would overflow MAX_PAGE_ORDER at jumbo MTU. The ring must fit one MAX_PAGE_ORDER block after ATU padding, and db_size is handed to the FDMA in the 16-bit DCB DATAL field. Advertise the resulting limit in dev->max_mtu (FDMA_PCI_MAX_MTU) when the FDMA is in use - a switch with no "fdma" interrupt named uses the unconstrained register-based path instead, so the cap is gated on lan966x->fdma, not lan966x_is_pci() alone. On a 4KB-page, MAX_PAGE_ORDER=10 build this is MTU 15498; the overhead is shared with lan966x_fdma_get_max_frame() via FDMA_OVERHEAD. Skip the resize until lan966x_fdma_pci_init() has built the rings; it runs after the netdevs register and sizes them from DEV_MAC_MAXLEN_CFG, already programmed by the caller. Tested-by: Herve Codina <herve.codina@bootlin.com> Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20260928-lan966x-pci-fdma-v9-12-a17caf60f89a@microchip.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'tools/lib/python/kdoc/python_version.py')
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