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authorJoel Fernandes <joelagnelf@nvidia.com>2026-09-29 20:41:39 -0700
committerAlexandre Courbot <acourbot@nvidia.com>2026-10-02 20:19:05 +0900
commit939b40877cb883de1fa335e950ff1a3f3bf113ed (patch)
tree9df65ac0fc50952904f10c47ed587f46a4795b3b /tools/lib/python/kdoc/python_version.py
parent4022bcaa34e2115e175f6a64022ec19a186b0d72 (diff)
gpu: nova-core: add the GIN interrupt tree and allocate its vectors
Servicing a GIN leaf has a required order: read its pending bits, then clear them. Clearing a leaf first discards every vector latched in it, and the hardware keeps no record of what was discarded. The interrupt never arrives, and no register shows that it was ever pending. Every subtree enabled at TOP also needs an allocated PCI vector with a handler registered on it. Under MSI-X each subtree has its own table entry. Linux masks every entry until a driver requests its IRQ, and a masked entry sends no message. An enabled subtree whose entry was never requested raises interrupts that never reach a handler, while the leaf and TOP registers show them pending and enabled. Under MSI the whole tree raises a single message, so one entry serves every subtree. Add the CPU interrupt tree of one PCIe function. The tree allocates the PCI vectors for the subtrees that it services and hands out the request for each, so that the chipset is given once and the vectors live as long as the tree. Reading a leaf yields the handle that clears it, so that the wrong order does not compile. Building a tree fails if it names a subtree that the GPU does not implement. A reset disables every vector, clears every pending bit, rearms delivery, and leaves the serviced subtrees disabled at TOP, so that a handler registered afterwards receives no interrupt left over from boot. Request MSI-X entries 0 through the highest serviced subtree, since an MSI-X allocation cannot be sparse, and fall back to a single MSI message, never to INTx. [jhubbard: reworked on top of the GIN vector types: a leaf read yields the handle that clears it, enables are guarded, the leaf count and the rearm come from the interrupt HAL, the drain reads every implemented leaf rather than descending from TOP, the tree owns its PCI vectors, and a reset returns the tree to a known state before a handler is registered] Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com> Signed-off-by: John Hubbard <jhubbard@nvidia.com> Reviewed-by: Will Pierce <wpierce@nvidia.com> Acked-by: Danilo Krummrich <dakr@kernel.org> Link: https://patch.msgid.link/20260930034148.590687-7-jhubbard@nvidia.com [acourbot: keep item that doesn't need to be exported private.] Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Diffstat (limited to 'tools/lib/python/kdoc/python_version.py')
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