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authorGabe Teeger <gabe.teeger@amd.com>2026-09-02 13:21:03 -0400
committerAlex Deucher <alexander.deucher@amd.com>2026-09-17 11:38:25 -0400
commitb788a0cfb256239599069e90fafec35cefe658b4 (patch)
tree7ecc1c031935c30945802c0435f6a654fa5425e4 /tools/lib/python/kdoc/python_version.py
parent9f1053de9280650d73afb4c8a4de658068725dae (diff)
drm/amd/display: Enable power gating on dcn42b
Turn on power gating by default for dcn42b in the following domains: DPP, HUBP, DSC. Root clock gating is enabled for the following domains: DPP, DSC, DPSTREAM, SYMCLK. Now DCN42b will match the exact PG and CG policies as dcn42. Reviewed-by: Matthew Stewart <matthew.stewart2@amd.com> Signed-off-by: Gabe Teeger <gabe.teeger@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/lib/python/kdoc/python_version.py')
0 files changed, 0 insertions, 0 deletions