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authorDaniel Machon <daniel.machon@microchip.com>2026-09-28 21:32:51 +0200
committerJakub Kicinski <kuba@kernel.org>2026-10-02 13:08:54 -0700
commit3318a794bb15e329d09dba3aaddd5ef8e22eace4 (patch)
treed513fd0086f23bb95fec78f020b00a973e022613 /tools/lib/python/kdoc
parent27470b22eca3492738374c377cc4aed83b84dc57 (diff)
net: microchip: fdma: add PCIe ATU support
When lan966x or lan969x operates as a PCIe endpoint, the internal FDMA engine cannot directly access host memory. Instead, DMA addresses must be translated through the PCIe Address Translation Unit (ATU). The ATU provides outbound windows that map internal addresses to PCIe bus addresses. The ATU outbound address space (0x10000000-0x1fffffff) is divided into six equally-sized regions (~42MB each). When FDMA buffers are allocated, a free ATU region is claimed and programmed with the DMA target address. The FDMA engine then uses the region's base address in its descriptors, and the ATU translates these to the actual DMA addresses on the PCIe bus. Add the required functions and helpers that combine the DMA allocation with the ATU region mapping. These are used by the lan966x PCIe FDMA path. The ATU cannot express a limit finer than its 64KB region granularity, so pad the mapped allocation to that boundary; otherwise the outbound window would extend past the memory the host allocated for DMA. This implementation will also be used by the lan969x, when PCIe FDMA is added for that platform in the future. Tested-by: Herve Codina <herve.codina@bootlin.com> Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20260928-lan966x-pci-fdma-v9-3-a17caf60f89a@microchip.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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