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authorAkhil P Oommen <akhilpo@oss.qualcomm.com>2026-09-23 15:55:45 +0530
committerRob Clark <robin.clark@oss.qualcomm.com>2026-09-27 08:18:21 -0700
commit020b8eaa1db838c6b58fd500a03218cd1ac76176 (patch)
tree8ce94a8a8ebf52a0912bcbffc825928098b71aa1 /tools/lib/python
parentb5269bf0e1adc2f5d313fce9268b9ac594dc26e0 (diff)
drm/msm/a6xx: Add BX rail support to GMU dependency votes
Some A8x targets have a third memory rail (BX) in addition to GX and MX. On these targets the GMU dependency vote carries a per-corner BX vote in bits 25:20, which otherwise default to all-ones (no BX constraint). Prepare BX vote field to pass this new voltage recommendation to GMU. Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/755597/ Message-ID: <20260923-hawi-gpu-v1-5-0c3c79a1a470@oss.qualcomm.com> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
Diffstat (limited to 'tools/lib/python')
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