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authorDaniel Machon <daniel.machon@microchip.com>2026-09-28 21:33:02 +0200
committerJakub Kicinski <kuba@kernel.org>2026-10-02 13:08:56 -0700
commit100eead96ed665e2b0026a3d8beaed79b28ff231 (patch)
tree6440150fc53c17ab3e59a434bb07a2ea7152a90e /tools/lib/python
parentfbb46fde69651a5d4b3cbbbf9d2d24f5b18fe38f (diff)
misc: lan966x-pci: dts: extend cpu reg to cover PCIE DBI space
The ATU outbound windows used by the FDMA engine are programmed through registers at offset 0x400000+, which falls outside the current cpu reg mapping. Extend the cpu reg size from 0x100000 (1MB) to 0x800000 (8MB) to cover the full PCIE DBI and iATU register space. Tested-by: Herve Codina <herve.codina@bootlin.com> Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20260928-lan966x-pci-fdma-v9-14-a17caf60f89a@microchip.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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