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authorMiquel Raynal (Schneider Electric) <miquel.raynal@bootlin.com>2026-02-05 19:09:48 +0100
committerMark Brown <broonie@kernel.org>2026-02-05 18:25:26 +0000
commit2b97f5cd1a956a9ac948ec57775600158988dadd (patch)
tree0ecfdedb5ad79216ae15ef0a73294b2ec53732c2 /tools/lib/python
parent8ea39d960c9f890e9213cdcfcbe4b3f281acd12f (diff)
spi: dt-bindings: cdns,qspi-nor: Add Renesas RZ/N1D400 to the list
Add support for the Renesas RZ/N1D400 QSPI controller. This SoC is identified in the bindings with its other name: r9a06g032. It is part of the RZ/N1 family, which contains a "D" and a "S" variant. IPs in this SoC are typically described using 2 compatibles: the SoC specific compatible and the family compatible. The original Cadence IP compatible is dropped because it is unusable on its own. Indirect accesses are not supported by this flavour of the Cadence IP, which means several properties have no meaning in the scope of the Renesas compatible. Let's make sure they are no longer expected nor mandatory. Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Miquel Raynal (Schneider Electric) <miquel.raynal@bootlin.com> Link: https://patch.msgid.link/20260205-schneider-6-19-rc1-qspi-v5-1-843632b3c674@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
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