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| author | Rong Bao <rong.bao@csmantle.top> | 2026-10-27 22:51:23 +0800 |
|---|---|---|
| committer | Huacai Chen <chenhuacai@loongson.cn> | 2026-10-27 22:51:23 +0800 |
| commit | f4eeaa783e040443cc7fd8a926c4b148e95a3356 (patch) | |
| tree | af25f2d6587aecf6cff634ba2a1ea10611f59f36 /tools/lib/python | |
| parent | 244eb26bbd152896f976db6415550993cd60b46d (diff) | |
LoongArch: Detect and expose LAMCAS feature existence
Currently, neither /proc/cpuinfo nor hwcap exposes the existence of the
LAMCAS extension, which is part of LA64v1.1. For example, on a Loongson
3B6000, /proc/cpuinfo is as follows:
processor : 23
package : 0
core : 11
global_id : 31
CPU Family : Loongson-64bit
Model Name : Loongson-3B6000
PRID : LA664 (0014d011)
CPU Revision : 0x11
FPU Revision : 0x01
CPU MHz : 2200.00
BogoMIPS : 4400.00
TLB Entries : 2112
Address Sizes : 48 bits physical, 48 bits virtual
ISA : loongarch32r loongarch32s loongarch64
Features : cpucfg lam lam_bh scq ual fpu lsx lasx
crc32 complex crypto lspw lvz lbt_x86 lbt_arm lbt_mips
Hardware Watchpoint : yes, iwatch count: 8, dwatch count: 4
... while the CPUCFG 2 instruction reads "0x7e7ccfcf", whose bit28 is 1,
indicating the actual presence of LAMCAS.
This hinders user-space inspection and detection of LAMCAS. For example,
in SpiderMonkey, we need to switch to larchintrin.h and then use the raw
__cpucfg() to manually perform the bit extraction. Also, a curious user
reading /proc/cpuinfo might be puzzled by the lack of display of LAMCAS.
Expose the existence of LAMCAS via cpuinfo and hwcap. The definition
point of the new LOONGARCH_CPU_LAMCAS flag is chosen so as to match the
practices in commit 1dd3e8a8eeb4059fb34b ("LoongArch: Define instruction
formats for AM{SWAP/ADD}.{B/H} and DBAR").
After this patch, /proc/cpuinfo looks like the following:
processor : 23
package : 0
core : 11
global_id : 31
CPU Family : Loongson-64bit
Model Name : Loongson-3B6000
PRID : LA664 (0014d011)
CPU Revision : 0x11
FPU Revision : 0x01
CPU MHz : 2200.00
BogoMIPS : 4400.00
TLB Entries : 2112
Address Sizes : 48 bits physical, 48 bits virtual
ISA : loongarch32r loongarch32s loongarch64
Features : cpucfg lam lam_bh lamcas scq ual fpu lsx
lasx crc32 complex crypto lspw lvz lbt_x86 lbt_arm lbt_mips
Hardware Watchpoint : yes, iwatch count: 8, dwatch count: 4
Note the addition of "lamcas" to the "Features" row.
Signed-off-by: Rong Bao <rong.bao@csmantle.top>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Diffstat (limited to 'tools/lib/python')
0 files changed, 0 insertions, 0 deletions
