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authorSuraj Kandpal <suraj.kandpal@intel.com>2026-10-22 09:35:29 +0530
committerJoonas Lahtinen <joonas.lahtinen@linux.intel.com>2026-11-02 09:49:01 +0200
commitf704594d36809780cf41fb201729dc1ac352c5d4 (patch)
tree180ec3c4c1bcc14770f9bf78317785a0b8b259af /tools/lib/python
parente30830d21860fbf030ad162c3db4d1219477dfb5 (diff)
drm/i915/display: Limit NVL TRANS_VTOTAL.Vtotal skip to A-step
The hardware issue which required us to keep vtotal as 0 has since been fixed on B0 well, so applying the workaround there is no longer correct and causes issues on B-stepping. Restrict the workaround to A-step only, in both transcoder timing paths and in the crtc_vtotal readout fixup in intel_vrr_get_config(). Fixes: a78d11e7859b ("drm/i915/display: Skip TRANS_VTOTAL.Vtotal write on NVL pre-C0") Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Mitul Golani<mitulkumar.ajitkumar.golani@intel.com> Link: https://patch.msgid.link/20261022040528.1403569-1-suraj.kandpal@intel.com (cherry picked from commit b749007b1ed67bc5482d15d3a1f6fe74555a81df) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Diffstat (limited to 'tools/lib/python')
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