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authorJunhui Liu <junhui.liu@pigmoral.tech>2026-07-29 00:40:15 +0800
committerYixun Lan <dlan@kernel.org>2026-09-07 07:47:16 +0000
commit01e2f07c44fc46180bdb10e70506f8acf44a53dd (patch)
tree9fcb1e9ef10ec06fe8f140426e1edab370e04868 /tools/perf/scripts/python/bin/stackcollapse-report
parentcee9395acd8043be0644b25c34bfa86623f2b935 (diff)
riscv: dts: spacemit: k3: Drop guest properties from M-level IMSIC
The mimsic node describes the machine-level IMSIC, whose MMIO region is 0x10000 (64 KiB) for all 8 harts. However, the node also specifies riscv,guest-index-bits = <6>, and per the AIA specification the per-hart stride is 2^(guest-index-bits + 12) bytes when guest interrupt files exist, i.e. 2^(6 + 12) = 256 KiB per hart and 2 MiB for all 8 harts. The described region cannot hold even a single hart's files, so the node contradicts itself. OpenSBI enforces exactly this constraint in imsic_data_check() and rejects the node with -EINVAL, preventing the M-level IMSIC from initializing: fdt_driver_init_by_offset: interrupt-controller@f1000000 (riscv,imsics) init failed: -3 init_coldboot: irqchip init failed (error -3) Moreover, guest interrupt files exist to act as the supervisor-level interrupt files of virtual harts; there is no machine-level counterpart. riscv,num-guest-ids is equally meaningless for the machine-level IMSIC. Drop both "riscv,guest-index-bits" and "riscv,num-guest-ids" properties from the mimsic node so the node matches the actual hardware layout. Fixes: 56f37e391a62 ("riscv: dts: spacemit: add initial support for K3 SoC") Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech> Reviewed-by: Yixun Lan <dlan@kernel.org> Link: https://patch.msgid.link/20260729-k3-mimsic-fix-v1-1-368c0aec04b9@pigmoral.tech Signed-off-by: Yixun Lan <dlan@kernel.org>
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