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authorAlex Elder <elder@riscstar.com>2026-09-02 16:43:20 -0500
committerBjorn Andersson <andersson@kernel.org>2026-09-03 09:40:13 -0500
commit3f7d46aaf5565471f65b2e21fbb649cedc55e6b8 (patch)
tree36cd0ce94618d5105ccc67004857c13273134611 /tools/perf/scripts/python/bin/stackcollapse-report
parent55580d234cec123e9b2964cab30fbfad10774b26 (diff)
arm64: dts: qcom: qcs8550-rb5gen2: clean up PCI function nodes
The Qualcomm RB5gen2 devicetree source file defines a node representing a TC956x chip which contains a PCIe switch and an embedded endpoint that implements two PCIe functions. The devicetree nodes erroneously include a "pci" device_type property for the two PCIe functions. That property should only be used for a PCI device "that implements a PCI bus". Remove this property for the two function nodes. In addition, only PCI bridge nodes should be named "pci@" (or "pcie@"). PCI endpoint nodes are typically named based on the functionality they implement (e.g., "ethernet@"). In this case, the role of these PCI functions is not (yet) specified, and furthermore they will be used with PCI endpoint buses. Rename these to use "dev@", following the convention used in of_pci_make_dev_node() for dynamically-created devicetree nodes. Finally, these nodes define #address-cells, #size-cells, and ranges properties, which are not normally defined for PCIe endpoints. Remove these properties as well; they can be added back once they are actually needed/used. Fixes: 33cae252054a6 ("arm64: dts: qcom: qcs8550: add QCS8550 RB5Gen2 board support") Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Alex Elder <elder@riscstar.com> Link: https://lore.kernel.org/r/20260902214321.1721477-7-elder@riscstar.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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